| A survey on fault injection methods of digital integrated circuits M Eslami, B Ghavami, M Raji, A Mahani Integration 71, 154-163, 2020 | 50 | 2020 |
| HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors M Kishani, HR Zarandi, H Pedram, A Tajary, M Raji, B Ghavami Design Automation for Embedded Systems 15, 289-310, 2011 | 35 | 2011 |
| Soft error rate reduction of combinational circuits using gate sizing in the presence of process variations M Raji, B Ghavami IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 247-260, 2016 | 23 | 2016 |
| Improving combinational circuit reliability against multiple event transients via a partition and restructuring approach MR Rohanipoor, B Ghavami, M Raji IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 21 | 2019 |
| Soft error rate estimation of combinational circuits based on vulnerability analysis M Raji, H Pedram, B Ghavami IET Computers & Digital Techniques 9 (6), 311-320, 2015 | 19 | 2015 |
| Aadam: a fast, accurate, and versatile aging-aware cell library delay model using feed-forward neural network SM Ebrahimipour, B Ghavami, H Mousavi, M Raji, Z Fang, L Shannon Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 18 | 2020 |
| Soft error reliability improvement of digital circuits by exploiting a fast gate sizing scheme M Raji, MA Sabet, B Ghavami IEEE Access 7, 66485-66495, 2019 | 18 | 2019 |
| Statistical functional yield estimation and enhancement of CNFET-based VLSI circuits B Ghavami, M Raji, H Pedram, M Pedram IEEE transactions on very large scale integration (VLSI) systems 21 (5), 887-900, 2012 | 17 | 2012 |
| A scalable solution to soft error tolerant circuit design using partitioning-based gate sizing MA Sabet, B Ghavami, M Raji IEEE Transactions on Reliability 66 (1), 245-256, 2017 | 14 | 2017 |
| Failure characterization of carbon nanotube FETs under process variations: Technology scaling issues B Ghavami, M Raji IEEE Transactions on Device and Materials Reliability 16 (2), 164-171, 2016 | 13 | 2016 |
| MOGATS: A multi-objective genetic algorithm-based task scheduling for heterogeneous embedded systems M Nikseresht, M Raji International Journal of Embedded Systems 14 (2), 171-184, 2021 | 12 | 2021 |
| Impacts of process variations and aging on lifetime reliability of flip-flops: A comparative analysis A Jafari, M Raji, B Ghavami IEEE Transactions on Device and Materials Reliability 19 (3), 551-562, 2019 | 12 | 2019 |
| A statistical gate sizing method for timing yield and lifetime reliability optimization of integrated circuits SM Ebrahimipour, B Ghavami, M Raji IEEE Transactions on Emerging Topics in Computing 9 (2), 759-773, 2020 | 11 | 2020 |
| Defect and variation issues on design mapping of reconfigurable nanoscale crossbars B Ghavami, A Tajary, M Raji, H Pedram 2010 IEEE Computer Society Annual Symposium on VLSI, 173-178, 2010 | 10 | 2010 |
| UMOTS: an uncertainty-aware multi-objective genetic algorithm-based static task scheduling for heterogeneous embedded systems M Raji, M Nikseresht The Journal of Supercomputing 78 (1), 279-314, 2022 | 9 | 2022 |
| Timing reliability improvement of master-slave flip-flops in the presence of aging effects A Jafari, M Raji, B Ghavami IEEE Transactions on Circuits and Systems I: Regular Papers 67 (12), 4761-4773, 2020 | 9 | 2020 |
| Gate resizing for soft error rate reduction in nano-scale digital circuits considering process variations M Raji, B Ghavami, H Pedram 2015 Euromicro Conference on Digital System Design, 445-452, 2015 | 9 | 2015 |
| A genetic algorithm-based tasks scheduling in multicore processors considering energy consumption HV Zand, M Raji, H Pedram, HH SharifAbadi International Journal of Embedded Systems 13 (3), 264-273, 2020 | 8 | 2020 |
| A practical metric for soft error vulnerability analysis of combinational circuits M Raji, H Pedram, B Ghavami Microelectronics Reliability 55 (2), 448-460, 2015 | 8 | 2015 |
| CNT-count failure characteristics of carbon nanotube FETs under process variations B Ghavami, M Raji, H Pedram, ON Arjmand 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2011 | 8 | 2011 |
Hossein PedramAssociate professor of computer engineering at Amirkabir University of TechnologyAdresse e-mail validée de aut.ac.ir
