| Hardware support for WCET analysis of hard real-time multicore systems M Paolieri, E Quiñones, FJ Cazorla, G Bernat, M Valero ACM SIGARCH Computer Architecture News 37 (3), 57-68, 2009 | 347 | 2009 |
| Measurement-Based Probabilistic Timing Analysis for Multi-path Programs FJC Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio ... Proceedings of the 2012 24th Euromicro Conference on Real-Time Systems, 91-101, 2012 | 342 | 2012 |
| Dynamically controlled resource allocation in SMT processors FJ Cazorla, A Ramirez, M Valero, E Fernández 37th International Symposium on Microarchitecture (MICRO-37'04), 171-182, 2004 | 244 | 2004 |
| Merasa: Multicore execution of hard real-time applications supporting analyzability T Ungerer, F Cazorla, P Sainrat, G Bernat, Z Petrov, C Rochange, ... IEEE Micro 30 (5), 66-75, 2010 | 234 | 2010 |
| An analyzable memory controller for hard real-time CMPs M Paolieri, E Quinones, FJ Cazorla, M Valero IEEE Embedded Systems Letters 1 (4), 86-90, 2009 | 210 | 2009 |
| Proartis: Probabilistically analyzable real-time systems FJ Cazorla, E Quiñones, T Vardanega, L Cucu, B Triquet, G Bernat, ... ACM Transactions on Embedded Computing Systems (TECS) 12 (2s), 1-26, 2013 | 200 | 2013 |
| WCET analysis methods: Pitfalls and challenges on their trustworthiness J Abella, C Hernández, E Quiñones, FJ Cazorla, PR Conmy, ... 10th IEEE International Symposium on Industrial Embedded Systems (SIES), 1-10, 2015 | 148 | 2015 |
| Multicore resource management KJ Nesbit, M Moreto, FJ Cazorla, A Ramirez, M Valero, JE Smith IEEE micro 28 (3), 6-16, 2008 | 140 | 2008 |
| Predictable performance in SMT processors: Synergy between the OS and SMTs FJ Cazorla, PMW Knijnenburg, R Sakellariou, E Fernandez, A Ramirez, ... IEEE Transactions on Computers 55 (7), 785-799, 2006 | 129 | 2006 |
| A cache design for probabilistically analysable real-time systems L Kosmidis, J Abella, E Quiñones, FJ Cazorla 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 513-518, 2013 | 127 | 2013 |
| On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments P Radojković, S Girbal, A Grasset, E Quiñones, S Yehia, FJ Cazorla ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-25, 2012 | 124 | 2012 |
| Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study F Wartel, L Kosmidis, C Lo, B Triquet, E Quinones, J Abella, A Gogonel, ... 2013 8th IEEE International Symposium on Industrial Embedded Systems (SIES …, 2013 | 103 | 2013 |
| On the comparison of deterministic and probabilistic WCET estimation techniques J Abella, D Hardy, I Puaut, E Quinones, FJ Cazorla 2014 26th Euromicro Conference on Real-Time Systems, 266-275, 2014 | 95 | 2014 |
| Assessing the suitability of the NGMP multi-core processor in the space domain M Fernández, R Gioiosa, E Quiñones, L Fossati, M Zulianello, FJ Cazorla Proceedings of the tenth ACM international conference on Embedded software …, 2012 | 93 | 2012 |
| Upper-bounding program execution time with extreme value theory FJ Cazorla, T Vardanega, E Quiñones, J Abella 13th International Workshop on Worst-Case Execution Time Analysis (2013), 2013 | 89 | 2013 |
| Kilo-instruction processors: Overcoming the memory wall A Cristal, OJ Santana, F Cazorla, M Galluzzi, T Ramirez, M Pericas, ... IEEE micro 25 (3), 48-57, 2005 | 89 | 2005 |
| Probabilistic worst-case timing analysis: Taxonomy and comprehensive survey FJ Cazorla, L Kosmidis, E Mezzetti, C Hernandez, J Abella, T Vardanega ACM Computing Surveys (CSUR) 52 (1), 1-35, 2019 | 86 | 2019 |
| Measurement-based worst-case execution time estimation using the coefficient of variation J Abella, M Padilla, JD Castillo, FJ Cazorla ACM Transactions on Design Automation of Electronic Systems (TODAES) 22 (4 …, 2017 | 86 | 2017 |
| Multi-core devices for safety-critical systems: A survey JP Cerrolaza, R Obermaisser, J Abella, FJ Cazorla, K Grüttner, I Agirre, ... ACM Computing Surveys (CSUR) 53 (4), 1-38, 2020 | 84 | 2020 |
| Adapting cache partitioning algorithms to pseudo-lru replacement policies K Kędzierski, M Moreto, FJ Cazorla, M Valero 2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010 | 83 | 2010 |
Jaume AbellaBarcelona Supercomputing Center (BSC)Adresse e-mail validée de bsc.es
