A 7nm CMOS technology platform for mobile and high performance compute application S Narasimha, B Jagannathan, A Ogino, D Jaeger, B Greene, C Sheraw, ...
2017 IEEE International Electron Devices Meeting (IEDM), 29.5. 1-29.5. 4, 2017
64 2017 A flexible, low-cost, high performance SiGe: C BiCMOS process with a one-mask HBT module D Knoll, KE Ehwald, B Heinemann, A Fox, K Blum, H Rucker, ...
Digest. International Electron Devices Meeting,, 783-786, 2002
56 2002 Advanced technique for broadband on-wafer RF device characterization RF Scholz, F Korndorfer, B Senapati, A Rumiantsev
ARFTG 63rd Conference, Spring 2004, 83-90, 2004
30 2004 A modular, low-cost SiGe: C BiCMOS process featuring high-f/sub T/and high BV/sub CEO/transistors D Knoll, B Heinemann, R Barth, K Blum, J Borngraber, J Drews, ...
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 …, 2004
28 2004 A two mask complementary LDMOS module integrated in a 0.25/spl mu/m SiGe: C BiCMOS platform KE Ehwald, A Fischer, F Fuernhammer, W Winkler, B Senapati, R Barth, ...
Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat …, 2004
20 2004 Advanced SPICE modelling of SiGe HBTs using VBIC model B Senapati, CK Maiti
IEE Proceedings-Circuits, Devices and Systems 149 (2), 129-135, 2002
18 2002 Challenges of analog and I/O scaling in 10nm SoC technology and beyond A Wei, J Singh, G Bouche, M Zaleski, R Augur, B Senapati, J Stephens, ...
2014 IEEE international electron devices meeting, 18.3. 1-18.3. 4, 2014
17 2014 High performance SiGe: C HBTs using atomic layer base doping B Tillack, Y Yamamoto, D Knoll, B Heinemann, P Schley, B Senapati, ...
Applied surface science 224 (1-4), 55-58, 2004
16 2004 Silicon heterostructure devices for RF wireless communication B Senapati, CK Maiti, NB Chakrabarti
VLSI Design 2000. Wireless and Digital Imaging in the Millennium …, 2000
15 2000 Effects of nitric-oxide-plasma treatment on the electrical properties of tetraethylorthosilicate-deposited silicon dioxides on strained- B Senapati, SK Samanta, S Maikap, LK Bera, CK Maiti
Applied Physics Letters 77 (12), 1840-1842, 2000
13 2000 A low-cost SiGe: C BiCMOS technology with embedded flash memory and complementary LDMOS module D Knoll, A Fox, KE Ehwald, B Heinemann, R Barth, A Fischer, H Rucker, ...
Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005 …, 2005
12 2005 Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors B Senapati, J Singh
US Patent 9,966,459, 2018
10 2018 High voltage MOSFET modeling E Seebacher, K Molnar, W Posch, B Senapati, A Steinmair, W Pflanzl
Compact Modeling: Principles, Techniques and Applications, 105-136, 2010
10 2010 Modelling of strained silicon-germanium material parameters for device simulation B Senapati
IETE Journal of Research 53 (3), 215-236, 2007
4 2007 Accurate modeling of low-cost SiGe: C-HBTs using adaptive neuro-fuzzy inference system A Chakravorty, RF Scholz, B Senapati, D Knoll, A Fox, R Garg, CK Maiti
Materials science in semiconductor processing 8 (1-3), 307-311, 2005
4 2005 Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors B Senapati, J Singh
US Patent 10,276,700, 2019
3 2019 Metallization layers configured for reduced parasitic capacitance B Senapati, J Singh, K Chandrasekaran
US Patent 9,230,913, 2016
3 2016 Design of active inductors in SiGe/SiGe: C processes for RF applications A Chakravorty, RF Scholz, B Senapati, R Garg, CK Maiti
International Journal of RF and Microwave Computer‐Aided Engineering: Co …, 2007
3 2007 Implementation of a scalable VBIC model for SiGe: C HBTs A Chakravorty, RF Scholz, D Knoll, A Fox, B Senapati, CK Maiti
Solid-state electronics 50 (3), 399-407, 2006
3 2006 Analog Compact Modeling for a 20-120V HV CMOS Technology BS E. Seebacher, W. Posch, K. Molnar, A. Steinmair
NSTI-Nanotech 3, 720-723, 2006
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