Joseph A (Josh) Fisher
Joseph A (Josh) Fisher
HP Senior Fellow Emeritus
Adresse e-mail validée de vliw.org
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Trace scheduling: A technique for global microcode compaction
JA Fisher
IEEE transactions on computers 30 (07), 478-490, 1981
17331981
Very long instruction word architectures and the ELI-512
JA Fisher
Proceedings of the 10th annual international symposium on Computer …, 1983
8381983
Instruction-level parallel processing: History, overview, and perspective
BR Rau, JA Fisher
Instruction-Level Parallelism, 9-50, 1993
5641993
Instruction-level parallel processing: History, overview, and perspective
BR Rau, JA Fisher
Instruction-Level Parallelism, 9-50, 1993
5551993
Instruction-level parallel processing: History, overview, and perspective
BR Rau, JA Fisher
Instruction-Level Parallelism, 9-50, 1993
5551993
Embedded computing: a VLIW approach to architecture, compilers and tools
JA Fisher, P Faraboschi, C Young
Elsevier, 2005
4922005
Embedded computing: a VLIW approach to architecture, compilers and tools
JA Fisher, P Faraboschi, C Young
Elsevier, 2005
4922005
Lx: A technology platform for customizable VLIW embedded processing
P Faraboschi, G Brown, JA Fisher, G Desoli, F Homewood
Proceedings of the 27th annual international symposium on Computer …, 2000
4722000
Predicting conditional branch directions from previous runs of a program
JA Fisher, SM Freudenberger
ACM SIGPLAN Notices 27 (9), 85-95, 1992
3131992
Measuring the parallelism available for very long instruction word architectures
A Nicolau, JA Fisher
IEEE Transactions on Computers 33 (11), 968-976, 1984
2651984
Parallel processing: A smart compiler and a dumb machine
JA Fisher, JR Ellis, JC Ruttenberg, A Nicolau
Proceedings of the 1984 SIGPLAN symposium on Compiler construction, 37-47, 1984
2081984
The VLIW machine: A multiprocessor for compiling scientific code
JA Fisher
Computer 17 (07), 45-53, 1984
1841984
The optimization of horizontal microcode within and beyond basic blocks: An application of processor scheduling with resources
JA Fisher
New York University, 1979
1251979
Custom-fit processors: Letting applications define architectures
JA Fisher, P Faraboschi, G Desoli
Proceedings of the 29th Annual IEEE/ACM International Symposium on …, 1996
1221996
Deli: A new run-time control point
G Desoli, N Mateev, E Duesterwald, P Faraboschi, JA Fisher
35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002
1212002
The latest word in digital and media processing
P Faraboschi, G Desoli, JA Fisher
IEEE signal processing magazine 15 (2), 59-85, 1998
1041998
Instruction scheduling for instruction level parallel processors
P Faraboschi, JA Fisher, C Young
Proceedings of the IEEE 89 (11), 1638-1659, 2001
862001
Instruction-level parallel processing
JA Fisher, R RAU
Science 253 (5025), 1233-1241, 1991
821991
System and method for isolating applications from each other
JA Fisher, A Lain
US Patent 7,051,340, 2006
792006
Clustered instruction-level parallel processors
P Faraboschi, G Desoli, JA Fisher
Hewlett Packard Laboratories, 1999
781999
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