Suivre
Jimmy Le Rhun
Titre
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Année
Deterministic platform software for hard real-time systems using multi-core COTS
S Girbal, X Jean, J Le Rhun, DG Pérez, M Gatti
2015 IEEE/AIAA 34th Digital Avionics Systems Conference (DASC), 8D4-1-8D4-15, 2015
502015
A complete toolchain for an interference-free deployment of avionic applications on multi-core systems
S Girbal, DG Pérez, J Le Rhun, M Faugère, C Pagetti, G Durrieu
2015 IEEE/AIAA 34th Digital Avionics Systems Conference (DASC), 7A2-1-7A2-14, 2015
29*2015
De-RISC: the first RISC-V space-grade platform for safety-critical systems
NJ Wessman, F Malatesta, J Andersson, P Gomez, M Masmano, ...
2021 IEEE Space Computing Conference (SCC), 17-26, 2021
242021
METrICS: a Measurement Environment for Multi-Core Time Critical Systems
S Girbal, J Le Rhun, H Saoud
Embedded Real Time Software and Systems (ERTS²) 2018, 2018
222018
Enhancing reconfigurable platforms programmability for synchronous data-flow applications
L Gantel, A Khiar, B Miramond, MEA Benkhelifa, L Kessal, F Lemonnier, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 5 (3), 1-16, 2012
172012
De-RISC–Dependable real-time infrastructure for safety-critical computer systems
F Gómez, M Masmano, V Nicolau, J Andersson, J Le Rhun, D Trilla, ...
Ada user journal 41 (2), 107-112, 2020
112020
A flexible operating system for dynamic applications
F Muller, J Le Rhun, F Lemonnier, B Miramond, L Devaux
XCell, 30-34, 2010
112010
De-risc: A complete risc-v based space-grade platform
NJ Wessman, F Malatesta, S Ribes, J Andersson, A García-Vilanova, ...
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 802-807, 2022
72022
Mixed critical system design and analysis
R Ernst, A Burns, L Thiele, J Le Rhun
Proceedings of the tenth ACM international conference on Embedded software …, 2012
72012
BB-RTE: a Budget-Based Runtime Engine for Mixed & Time Critical Systems
S Girbal, J Le Rhun
Embedded Real Time Software and Systems (ERTS²) 2018, 2018
4*2018
Method and device for distributing partitions on a multicore processor
J LE RHUN, D GRACIA PEREZ, S GIRBAL
US Patent App. 16/322,789, 2019
2*2019
De-RISC: Launching RISC-V into space
J Le Rhun, V Nicolau, A Garcia-Vilanova, J Andersson, S Alcaide
2nd European Workshop on On-Board Data Processing (OBDP2021), 2021
12021
Open Source Hardware: An Opportunity For Critical Systems
J Le Rhun, S Girbal, D Gracia Pérez
2020 50th Annual IEEE/IFIP International Conference on Dependable Systems …, 2020
12020
Securing a RISC-V architecture: A dynamic approach
S Pillement, MM Real, J Pottier, T Nieddu, B Le Gal, S Faucou, ...
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-5, 2023
2023
The challenge of profiling multi-core safety-critical embedded systems
S Girbal, J Le Rhun
ECRTS 2019, 2019
2019
Calculateur comprenant un processeur multi-coeurs et un procede de controle
X Jean, M Faugere, D Gracia Perez, J Le Rhun, S Girbal, A Grasset, ...
FR Patent FR3045866B1, 2017
2017
Safe, Secure and Reliable Computing with the NOEL-V Processor: from the De-RISC H2020 Project and onward
J Le Rhun, S Girbal, J Klockars, NJ Wessman, F Malatesta, J Andersson
SAFETY & SECURITY MONITORING CONVERGENCE
S Girbal, J Le Rhun, DG Pérez, D Faura
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