Vianney Lapotre
Vianney Lapotre
Associate professor / Lab-STICC
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A trace-driven approach for fast and accurate simulation of manycore architectures
A Butko, R Garibotti, L Ost, V Lapotre, A Gamatie, G Sassatelli, ...
The 20th Asia and South Pacific Design Automation Conference, 707-712, 2015
Hardware/software co-design of an accelerator for FV homomorphic encryption scheme using Karatsuba algorithm
V Migliore, MM Real, V Lapotre, A Tisserand, C Fontaine, G Gogniat
IEEE Transactions on Computers 67 (3), 335-347, 2016
Dynamic spatially isolated secure zones for NoC-based many-core accelerators
MM Real, P Wehner, V Migliore, V Lapotre, D Göhringert, G Gogniat
2016 11th International Symposium on Reconfigurable Communication-centric …, 2016
Nights-watch: A cache-based side-channel intrusion detector using hardware performance counters
M Mushtaq, A Akram, MK Bhatti, M Chaudhry, V Lapotre, G Gogniat
Proceedings of the 7th International Workshop on Hardware and Architectural …, 2018
A high-speed accelerator for homomorphic encryption using the karatsuba algorithm
V Migliore, C Seguin, MM Real, V Lapotre, A Tisserand, C Fontaine, ...
ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-17, 2017
ARMHEx: A hardware extension for DIFT on ARM-based SoCs
MA Wahab, P Cotret, MN Allah, G Hiet, V Lapotre, G Gogniat
2017 27th International Conference on Field Programmable Logic and …, 2017
Somewhat/fully homomorphic encryption: Implementation progresses and challenges
G Bonnoron, C Fontaine, G Gogniat, V Herbert, V Lapôtre, V Migliore, ...
International Conference on Codes, Cryptology, and Information Security, 68-82, 2017
Performance exploration of partially connected 3D NoCs under manufacturing variability
A Kologeski, FL Kastensmidt, V Lapotre, A Gamatié, G Sassatelli, ...
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), 61-64, 2014
Teaching android mobile security
JF Lalande, V Viet Triem Tong, P Graux, G Hiet, W Mazurczyk, H Chaoui, ...
Proceedings of the 50th ACM Technical Symposium on Computer Science …, 2019
Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes
P Murugappa, V Lapotre, A Baghdadi, M Jezequel
2013 International symposium on rapid system prototyping (RSP), 87-93, 2013
Stopping-free dynamic configuration of a multi-ASIP turbo decoder
V Lapotre, P Murugappa, G Gogniat, A Baghdadi, M Hübner, JP Diguet
2013 Euromicro Conference on Digital System Design, 155-162, 2013
Fast evaluation of homomorphic encryption schemes based on ring-LWE
C Feron, V Lapotre, L Lagadec
2018 9th IFIP International Conference on New Technologies, Mobility and …, 2018
Towards a hardware-assisted information flow tracking ecosystem for ARM processors
MA Wahab, P Cotret, MN Allah, G Hiet, V Lapotre, G Gogniat
2016 26th International Conference on Field Programmable Logic and …, 2016
MPSoCSim extension: An OVP Simulator for the Evaluation of Cluster-based Multi and Many-core architectures
MM Real, P Wehner, J Rettkowski, V Migliore, V Lapotre, D Göhringer, ...
2016 International Conference on Embedded Computer Systems: Architectures …, 2016
ALMOS many-core operating system extension with new secure-enable mechanisms for dynamic creation of secure zones
MM Real, V Migliore, V Lapotre, G Gogniat
2016 24th Euromicro International Conference on Parallel, Distributed, and …, 2016
On the performance exploration of 3d nocs with resistive-open tsvs
C Effiong, V Lapotre, A Gamatié, G Sassatelli, A Todri-Sanial, K Latif
2015 IEEE Computer Society Annual Symposium on VLSI, 579-584, 2015
A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP context
V Lapotre, P Murugappa, G Gogniat, A Baghdadi, JP Diguet, JN Bazin, ...
2013 IEEE computer society annual symposium on VLSI (ISVLSI), 40-45, 2013
Run-time Detection of Prime+ Probe Side-Channel Attack on AES Encryption Algorithm
M Mushtaq, A Akram, MK Bhatti, RNB Rais, V Lapotre, G Gogniat
2018 Global Information Infrastructure and Networking Symposium (GIIS), 1-5, 2018
PAnTHErS: A Prototyping and Analysis Tool for Homomorphic Encryption Schemes.
C Feron, V Lapotre, L Lagadec
SECRYPT, 359-366, 2017
Using a virtual plant to support the development of intelligent gateway for sensors/actuators security
T Toublanc, S Guillet, F de Lamotte, P Berruet, V Lapotre
IFAC-PapersOnLine 50 (1), 5837-5842, 2017
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