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Antonio Strollo
Antonio Strollo
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Approximate multipliers based on new approximate compressors
D Esposito, AGM Strollo, E Napoli, D De Caro, N Petra
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (12), 4169-4182, 2018
2352018
Comparison and extension of approximate 4-2 compressors for low-power approximate multipliers
AGM Strollo, E Napoli, D De Caro, N Petra, G Di Meo
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (9), 3021-3034, 2020
2002020
An FPGA-based performance analysis of the unrolling, tiling, and pipelining of the AES algorithm
GP Saggese, A Mazzeo, N Mazzocca, AGM Strollo
Field Programmable Logic and Application: 13th International Conference, FPL …, 2003
1882003
A novel high-speed sense-amplifier-based flip-flop
AGM Strollo, D De Caro, E Napoli, N Petra
IEEE transactions on very large scale integration (VLSI) systems 13 (11 …, 2005
1562005
Truncated binary multipliers with variable correction and minimum mean square error
N Petra, D De Caro, V Garofalo, E Napoli, AGM Strollo
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (6), 1312-1325, 2009
1552009
A new SPICE model of power PIN diode based on asymptotic waveform evaluation
AGM Strollo
IEEE Transactions on Power Electronics 12 (1), 12-20, 1997
1221997
High-performance direct digital frequency synthesizers using piecewise-polynomial approximation
D De Caro, AGM Strollo
IEEE Transactions on Circuits and Systems I: Regular Papers 52 (2), 324-337, 2005
1142005
Dual-tree error compensation for high performance fixed-width multipliers
AGM Strollo, N Petra, D De Caro
IEEE Transactions on Circuits and Systems II: Express Briefs 52 (8), 501-507, 2005
1032005
A fast time-domain algorithm for the simulation of switching power converters
AM Luciano, AGM Strollo
IEEE Transactions on Power Electronics 5 (3), 363-370, 1990
1031990
Design of fixed-width multipliers with linear compensation function
N Petra, D De Caro, V Garofalo, E Napoli, AGM Strollo
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (5), 947-960, 2010
1002010
New clock-gating techniques for low-power flip-flops
AGM Strollo, E Napoli, D De Caro
Proceedings of the 2000 international symposium on Low power electronics and …, 2000
992000
Optimal ON-resistance versus breakdown voltage tradeoff in superjunction power devices: A novel analytical model
AGM Strollo, E Napoli
IEEE Transactions on Electron Devices 48 (9), 2161-2167, 2001
922001
Variable latency speculative parallel prefix adders for unsigned and signed operands
D Esposito, D De Caro, AGM Strollo
IEEE Transactions on Circuits and Systems I: Regular Papers 63 (8), 1200-1209, 2016
712016
High speed speculative multipliers based on speculative carry-save tree
A Cilardo, D De Caro, N Petra, F Caserta, N Mazzocca, E Napoli, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (12), 3426-3435, 2014
712014
Direct digital frequency synthesizers with polynomial hyperfolding technique
D De Caro, E Napoli, AGM Strollo
IEEE Transactions on Circuits and Systems II: Express Briefs 51 (7), 337-344, 2004
692004
Booth folding encoding for high performance squarer circuits
AGM Strollo, D De Caro
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003
692003
Low-power approximate MAC unit
D Esposito, AGM Strollo, M Alioto
2017 13th Conference on Ph. D. Research in Microelectronics and Electronics …, 2017
672017
Low power flip-flop with clock gating on master and slave latches
AGM Strollo, D De Caro
Electronics Letters 36 (4), 294-295, 2000
672000
A 1.27 GHz, all-digital spread spectrum clock generator/synthesizer in 65 nm CMOS
D De Caro, CA Romani, N Petra, AGM Strollo, C Parrella
IEEE Journal of Solid-State Circuits 45 (5), 1048-1060, 2010
662010
Reducing lookup-table size in direct digital frequency synthesizers using optimized multipartite table method
D De Caro, N Petra, AGM Strollo
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (7), 2116-2127, 2008
642008
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