Christophe JEGO
Christophe JEGO
Professor IMS Laboratory
Adresse e-mail validée de enseirb-matmeca.fr - Page d'accueil
TitreCitée parAnnée
OFDM-IDMA versus IDMA with ISI cancellation for quasistatic Rayleigh fading multipath channels
IM Mahafeno, C Langlais, C Jego
4th International Symposium on Turbo Codes & Related Topics; 6th …, 2006
1162006
Design of rotated QAM mapper/demapper for the DVB-T2 standard
M Li, CA Nour, C Jego, C Douillard
2009 IEEE Workshop on Signal Processing Systems, 018-023, 2009
542009
Stochastic decoding of turbo codes
QT Dong, M Arzel, C Jego, WJ Gross
IEEE Transactions on Signal Processing 58 (12), 6421-6425, 2010
422010
High-throughput multi-core LDPC decoders based on x86 processor
B Le Gal, C Jego
IEEE transactions on parallel and distributed systems 27 (5), 1373-1386, 2015
322015
Multi-Gb/s software decoding of polar codes
B Le Gal, C Leroux, C Jego
IEEE transactions on signal processing 63 (2), 349-359, 2014
312014
A high throughput efficient approach for decoding LDPC codes onto GPU devices
B Le Gal, C Jego, J Crenne
IEEE Embedded Systems Letters 6 (2), 29-32, 2014
312014
Full-parallel architecture for turbo decoding of product codes
C Jego, P Adde, C Leroux
Electronics Letters 42 (18), 1052-1054, 2006
292006
C-based rapid prototyping for digital signal processing
E Casseau, B Le Gal, P Bomel, C Jego, S Huet, E Martin
2005 13th European Signal Processing Conference, 1-4, 2005
292005
Partial sums generation architecture for successive cancellation decoding of polar codes
G Berhault, C Leroux, C Jego, D Dallet
SiPS 2013 Proceedings, 407-412, 2013
262013
Stochastic decoding of linear block codes with high-density parity-check matrices
SS Tehrani, C Jego, B Zhu, WJ Gross
IEEE Transactions on Signal Processing 56 (11), 5733-5739, 2008
232008
Design and FPGA prototyping of a bit-interleaved coded modulation receiver for the DVB-T2 standard
M Li, CA Nour, C Jego, C Douillard
2010 IEEE Workshop On Signal Processing Systems, 162-167, 2010
222010
Fast converging ADMM-penalized algorithm for LDPC decoding
I Debbabi, B Le Gal, N Khouja, F Tlili, C Jego
IEEE Communications Letters 20 (4), 648-651, 2016
212016
CTH12-4: Reduced complexity iterative multi-user detector for IDMA (interleave-division multiple access) system
IM Mahafeno, C Langlais, C Jego
IEEE Globecom 2006, 1-5, 2006
212006
Efficient architecture for Reed Solomon block turbo code
E Piriou, C Jego, P Adde, R Le Bidan, M Jézéquel
2006 IEEE International Symposium on Circuits and Systems, 4 pp., 2006
212006
Towards Gb/s turbo decoding of product code onto an FPGA device
C Leroux, C Jego, P Adde, M Jezequel
2007 IEEE International Symposium on Circuits and Systems, 909-912, 2007
172007
High-throughput LDPC decoder on low-power embedded processors
B Le Gal, C Jego
IEEE Communications Letters 19 (11), 1861-1864, 2015
152015
A new single-error correction scheme based on self-diagnosis residue number arithmetic
Y Tang, E Boutillon, C Jégo, M Jézéquel
2010 Conference on Design and Architectures for Signal and Image Processing …, 2010
152010
Turbo decoding of product codes based on the modified adaptive belief propagation algorithm
C Jego, WJ Gross
2007 IEEE International Symposium on Information Theory, 641-644, 2007
152007
Interconnect cost control during high-level synthesis
C Jego, E Casseau, E Martin
Proceedings of Design Circuits & Integrated Systems Conference, 507-512, 2000
152000
Efficient iterative receiver for bit-Interleaved Coded Modulation according to the DVB-T2 standard
M Li, CA Nour, C Jego, J Yang, C Douillard
2011 IEEE International Conference on Acoustics, Speech and Signal …, 2011
132011
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