Lang Lin
Lang Lin
ANSYS, Intel, UMass
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Trojan side-channels: Lightweight hardware trojans through side-channel engineering
L Lin, M Kasper, T Güneysu, C Paar, W Burleson
International Workshop on Cryptographic Hardware and Embedded Systems, 382-395, 2009
MOLES: malicious off-chip leakage enabled by side-channels
L Lin, W Burleson, C Paar
2009 IEEE/ACM International Conference on Computer-Aided Design-Digest of …, 2009
Low-power sub-threshold design of secure physical unclonable functions
L Lin, D Holcomb, DK Krishnappa, P Shabadi, W Burleson
Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010
Design and validation of arbiter-based PUFs for sub-45-nm low-power security applications
L Lin, S Srivathsa, DK Krishnappa, P Shabadi, W Burleson
IEEE Transactions on Information Forensics and Security 7 (4), 1394-1403, 2012
Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems
L Lin, W Burleson
2008 IEEE International Symposium on Circuits and Systems, 252-255, 2008
Analysis and mitigation of process variation impacts on power-attack tolerance
L Lin, W Burleson
Proceedings of the 46th annual design automation conference, 238-243, 2009
Implementing hardware trojans: Experiences from a hardware trojan challenge
GT Becker, A Lakshminarasimhan, L Lin, S Srivathsa, VB Suresh, ...
2011 IEEE 29th International Conference on Computer Design (ICCD), 301-304, 2011
Design optimization and security validation of sub-threshold PUFs
L Lin, D Holcomb, DK Krishnappa, P Shabadi, W Burleson
SECSI-2010, 2010
Side-Channel Attack Tolerant Logic Styles
S Hanay, TB Ahmed, X Yun, L Lin
Cryptographic circuit design in nanometer CMOS technologies
L Lin
University of Massachusetts Amherst, 2012
The Role of Leakage Power in Extracting Secrets from CMOS Cryptosystems
L Lin
Trojan Side Channels
L Lin, M Kasper, T Güneysu, C Paar, W Burleson
Side-Channel Tolerant Logic Styles
L Lin, S Hanay, TB Ahmed, X Yun
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