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Swagata Mandal
Swagata Mandal
Jalpaiguri Government Engg. College
Verified email at ece.jgec.ac.in - Homepage
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Cited by
Cited by
Year
Criticality aware soft error mitigation in the configuration memory of SRAM based FPGA
S Mandal, S Sarkar, WM Ming, A Chattopadhyay, A Chakrabarti
2019 32nd International Conference on VLSI Design and 2019 18th …, 2019
112019
A novel method for soft error mitigation in FPGA using modified matrix code
S Mandal, R Paul, S Sau, A Chakrabarti, S Chattopadhyay
IEEE Embedded Systems Letters 8 (4), 65-68, 2016
102016
Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware
S Mandal, R Paul, S Sau, A Chakrabarti, S Chattopadhyay
Microprocessors and Microsystems 51, 313-330, 2017
82017
Internal monitoring of GBTx emulator using IPbus for CBM experiment
S Mandal, W Zabolotny, S Sau, A Chkrabarti, J Saini, S Chattopadhyay, ...
Photonics Applications in Astronomy, Communications, Industry, and High …, 2015
52015
Binary field point multiplication implementation in FPGA hardware
S Sau, P Baidya, R Paul, S Mandal
Intelligent and Cloud Computing: Proceedings of ICICC 2019, Volume 1, 387-394, 2020
42020
IMACE: In-memory acceleration of classic McEliece encoder
K Nagarajan, SS Ensan, S Mandal, S Ghosh, A Chattopadhyay
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 513-518, 2019
42019
Outage minimized joint power and channel allocation in multihop cognitive radio networks: A lifetime-centric approach
T Acharya, SP Maity, S Mandal
Wireless Personal Communications 83, 2519-2537, 2015
42015
Fpga based novel high speed daq system design with error correction
S Mandal, S Sau, A Chakrabarti, J Saini, SK Pal, S Chattopadhyay
2015 IEEE Computer Society Annual Symposium on VLSI, 80-85, 2015
42015
Lightweight ASIC implementation of AEGIS-128
A Baksi, V Pudi, S Mandal, A Chattopadhyay
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 251-256, 2018
32018
Testing of large size GEM detector with Pb+ Pb collision at CERN-SPS
A Kumar, S Mandal, CS Gosh, S Chattopadhyay, AK Dubey, D Nag, ...
DAE Symp. Nucl. Phys. 62, 1006-1007, 2017
32017
Integration of GBTx emulator with MUCH-XYTER and data processing board for CBM experiment
S Mandal, J Saini, S Sau, A Chakrabarti, W Zabolotny, S Chattopadhyay, ...
2016 IEEE Nuclear Science Symposium, Medical Imaging Conference and Room …, 2016
32016
An FPGA-Based High-Speed Error Resilient Data Aggregation and Control for High Energy Physics Experiment
S Mandal, J Saini, WM Zabołotny, S Sau, A Chakrabarti, S Chattopadhyay
IEEE Transactions on Nuclear Science 64 (3), 933-944, 2017
22017
FPGA implementation of high speed latency optimized optical communication system based on orthogonal concatenated code
S Mandal, S Sau, A Chakrabarti, SK Pal, S Chattopadhyay
2015 IEEE 24th Asian Test Symposium (ATS), 169-174, 2015
22015
Near Threshold Computation of Partitioned Ring Learning With Error (RLWE) Post Quantum Cryptography on Reconfigurable Architecture
P Baidya, S Mondal, R Paul
arXiv preprint arXiv:2208.08093, 2022
12022
FPGA based firmware design—the routing of microfluid droplet based on Lee’s algorithm
S Sarkar, S Sau, R Paul, S Mandal
Advances in Distributed Computing and Machine Learning: Proceedings of …, 2022
12022
Clustered error resilient SRAM-based reconfigurable computing platform
S Mandal, A Chakrabarti, S Bodapati
IEEE Transactions on Aerospace and Electronic Systems 57 (3), 1768-1779, 2021
12021
ReRAM-based in-memory computation of galois field arithmetic
S Mandal, D Bhattacharjee, Y Tavva, A Chattopadhyay
2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018
12018
A real time sorting algorithm to time sort any deterministic time disordered data stream
J Saini, S Mandal, A Chakrabarti, S Chattopadhyay
Journal of Instrumentation 12 (12), P12023, 2017
12017
Joint power and channel allocation for outage probability minimization in cognitive radio ad hoc networks
T Acharya, S Mandal, SP Maity
2013 Fifth International Conference on Communication Systems and Networks …, 2013
12013
Differential Fault Analysis of Trivium Using Artificial Neural Network on SoC Platform
A Tewary, S Mandal, A Chakrabarti, D Saha, A Adhikari
Emerging Electronic Devices, Circuits and Systems: Select Proceedings of …, 2023
2023
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