Christian Mayr

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Johannes PartzschChair for Highly Parallel VLSI Systems and Neuromorphic Circuits, TU DresdenAdresse e-mail validée de tu-dresden.de
Sebastian HöppnerTU DresdenAdresse e-mail validée de tu-dresden.de
Bernhard VoggingerTechnische Universität DresdenAdresse e-mail validée de tu-dresden.de
Steve FurberProfessor of Computer Engineering, Department of Computer Science, The University of Manchester, UKAdresse e-mail validée de manchester.ac.uk
Heidemarie SchmidtTechnische Universität ChemnitzAdresse e-mail validée de etit.tu-chemnitz.de
Nan DuTU ChemnitzAdresse e-mail validée de s2012.tu-chemnitz.de
Richard GeorgeTU DresdenAdresse e-mail validée de tu-dresden.de
Giacomo IndiveriInstitute of Neuroinformatics, University of Zurich and ETH ZurichAdresse e-mail validée de ini.uzh.ch
chen liuChair of Highly-Parallel VLSI-Systems and Neuro-Microelectronics, Technische Universität DresdenAdresse e-mail validée de tu-dresden.de
Yexin YanTU DresdenAdresse e-mail validée de tu-dresden.de
Oliver G SchmidtProfessor at TU Chemnitz, Adjunct Professor at TU DresdenAdresse e-mail validée de etit.tu-chemnitz.de
Johannes SchemmelHeidelberg UniversityAdresse e-mail validée de kip.uni-heidelberg.de
stefano vassanelliProfessor of Physiology, University of PadovaAdresse e-mail validée de unipd.it
Dennis WalterTU Dresden, Chair of Highly Parallel VLSI-System and Neuro-MicroelectronicsAdresse e-mail validée de tu-dresden.de
Andreas GrüblHeidelberg UniversityAdresse e-mail validée de kip.uni-heidelberg.de
Hector A. GonzalezTechnische Universität DresdenAdresse e-mail validée de tu-dresden.de
David KappelUniversität GöttingenAdresse e-mail validée de uni-goettingen.de
Themis ProdromakisRegius Chair of Engineering, Centre for Electronics Frontiers, University of EdinburghAdresse e-mail validée de ed.ac.uk
Federico RocchiPhd Student, CiMeC, CNCS@IITAdresse e-mail validée de unitn.it
Andrea CornaPhDAdresse e-mail validée de tuwien.ac.at

Suivre

Christian Mayr

Professor, Technische Universität Dresden

Adresse e-mail validée de tu-dresden.de - Page d'accueil

neuromorphic engineering brain machine interfaces ADC MPSoC


Titre Trier par citations Trier par année Trier par titre	Citée par Citée par	Année
Plasticity in memristive devices for spiking neural networks S Saïghi, CG Mayr, T Serrano-Gotarredona, H Schmidt, G Lecerf, J Tomas, ... Frontiers in neuroscience 9, 51, 2015	212	2015
A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems D Brüderle, MA Petrovici, B Vogginger, M Ehrlich, T Pfeil, S Millner, ... Biological cybernetics 104 (4), 263-296, 2011	132	2011
Neuromorphic hardware in the loop: Training a deep spiking network on the brainscales wafer-scale system S Schmitt, J Klähn, G Bellec, A Grübl, M Guettler, A Hartel, S Hartmann, ... 2017 international joint conference on neural networks (IJCNN), 2227-2234, 2017	128	2017
Exploiting Memristive BiFeO₃ Bilayer Structures for Compact Sequential Logics T You, Y Shuai, W Luo, N Du, D Bürger, I Skorupa, R Hübner, S Henker, ... Advanced Functional Materials 24 (22), 3357-3365, 2014	120	2014
A biological-realtime neuromorphic system in 28 nm CMOS using low-leakage switched capacitor circuits C Mayr, J Partzsch, M Noack, S Hänzsche, S Scholze, S Höppner, ... IEEE transactions on biomedical circuits and systems 10 (1), 243-254, 2015	83	2015
Live demonstration: A scaled-down version of the brainscales wafer-scale neuromorphic system J Schemmel, A Grübl, S Hartmann, A Kononov, C Mayr, K Meier, S Millner, ... 2012 IEEE international symposium on circuits and systems (ISCAS), 702-702, 2012	75	2012
Memristive synapses connect brain and silicon spiking neurons A Serb, A Corna, R George, A Khiat, F Rocchi, M Reato, M Maschietto, ... Scientific reports 10 (1), 1-7, 2020	58	2020
Single pairing spike-timing dependent plasticity in BiFeO₃ memristors with a time window of 25 ms to 125 μs N Du, M Kiani, CG Mayr, T You, D Bürger, I Skorupa, OG Schmidt, ... Frontiers in neuroscience 9, 227, 2015	57	2015
Rate and pulse based plasticity governed by local synaptic state variables CG Mayr, J Partzsch Frontiers in Synaptic Neuroscience 2, 33, 2010	51	2010
A 32 GBit/s communication SoC for a waferscale neuromorphic system S Scholze, H Eisenreich, S Höppner, G Ellguth, S Henker, M Ander, ... Integration 45 (1), 61-75, 2012	50	2012
SpiNNaker 2: A 10 Million Core Processor System for Brain Simulation and Machine Learning C Mayr, S Hoeppner, S Furber Communicating Process Architectures CPA 2018 1, 277-280, 2018	46	2018
Implementation of a spike-based perceptron learning rule using TiO_2−x memristors H Mostafa, A Khiat, A Serb, CG Mayr, G Indiveri, T Prodromakis Frontiers in neuroscience 9, 357, 2015	46	2015
Memory-efficient deep learning on a SpiNNaker 2 prototype C Liu, G Bellec, B Vogginger, D Kappel, J Partzsch, F Neumärker, ... Frontiers in neuroscience 12, 840, 2018	45	2018
VLSI implementation of a 2.8 Gevent/s packet-based AER interface with routing and event sorting functionality S Scholze, S Schiefer, J Partzsch, S Hartmann, CG Mayr, S Höppner, ... Frontiers in neuroscience 5, 117, 2011	44	2011
Nonvolatile Multilevel Resistive Switching in Irradiated Thin Films Y Shuai, X Ou, W Luo, N Du, C Wu, W Zhang, D Burger, C Mayr, ... IEEE Electron Device Letters 34 (1), 54-56, 2012	41	2012
Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS M Noack, J Partzsch, CG Mayr, S Hänzsche, S Scholze, S Höppner, ... Frontiers in neuroscience 9, 10, 2015	38	2015
Waveform driven plasticity in BiFeO3 memristive devices: model and implementation C Mayr, P Staerke, J Partzsch, L Cederstroem, R Schüffny, Y Shuai, N Du, ... Advances in Neural Information Processing Systems 25, 2012	34	2012
Wafer-scale VLSI implementations of pulse coupled neural networks M Ehrlich, C Mayr, H Eisenreich, S Henker, A Srowig, A Grübl, ... Proceedings of the international conference on sensors, circuits and …, 2007	34	2007
A heterogeneous SDR MPSoC in 28 nm CMOS for low-latency wireless applications S Haas, T Seifert, B Nöthen, S Scholze, S Höppner, A Dixius, EP Adeva, ... Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017	33	2017
A fixed point exponential function accelerator for a neuromorphic many-core system J Partzsch, S Höppner, M Eberlein, R Schüffny, C Mayr, DR Lester, ... 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017	30	2017

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