Adrien CASSAGNE
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Beyond Gbps turbo decoder on multi-core CPUs
A Cassagne, T Tonnellier, C Leroux, B Le Gal, O Aumage, D Barthou
2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016
142016
An efficient, portable and generic library for successive cancellation decoding of polar codes
A Cassagne, B Le Gal, C Leroux, O Aumage, D Barthou
Languages and Compilers for Parallel Computing, 303-317, 2015
132015
Fast simulation and prototyping with AFF3CT
A Cassagne, O Hartmann, M Leonardon, T Tonnellier, G Delbergue, ...
International Workshop on Signal Processing Systems (SiPS), 2017
82017
Energy consumption analysis of software polar decoders on low power processors
A Cassagne, O Aumage, C Leroux, D Barthou, B Le Gal
2016 24th European Signal Processing Conference (EUSIPCO), 642-646, 2016
82016
MIPP: a Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard
A Cassagne, O Aumage, D Barthou, C Leroux, C Jégo
Proceedings of the 2018 4th Workshop on Programming Models for SIMD/vector …, 2018
62018
Toward high-performance implementation of 5G SCMA algorithms
A Ghaffari, M Léonardon, A Cassagne, C Leroux, Y Savaria
IEEE Access 7, 10402-10414, 2019
52019
JAGUAR: a new CFD code dedicated to massively parallel high-order LES computations on complex geometry
A Cassagne, JF Boussuge, N Villedieu, G Puigt, I D'ast, A Genot
52015
Fast and flexible software polar list decoders
M Léonardon, A Cassagne, C Leroux, C Jégo, LP Hamelin, Y Savaria
Journal of Signal Processing Systems 91 (8), 937-952, 2019
42019
High-order method for a new generation of Large Eddy Simulation solver
A Cassagne, JF Boussuge, G Puigt
32015
AFF3CT: A Fast Forward Error Correction Toolbox!
A Cassagne, O Hartmann, M Leonardon, K He, C Leroux, R Tajan, ...
SoftwareX 10, 100345, 2019
12019
Concurrent kernel execution on Graphic Processing Units
A Cassagne, A George, B Lorendeau, JC Papin, A Rougier
hgpu. org, 2013
12013
StarPU
S Archipoff, C Augonnet, O Aumage, G Beauchamp, B Bramas, A Buttari, ...
2020
AFF3CT: Un environnement de simulation pour le codage de canal
A Cassagne, M Leonardon, O Hartmann, T Tonnellier, G Delbergue, ...
2017
Portage d’un code de lattice QCD sur GPU
A Cassagne, B Mortier, D Pasqualinotto, V Fréchaud
Étude et implémentation d’une méthode de calcul pour la simulation numérique sur des architectures modernes
A Cassagne
HORSE: High-order method for a new generation of laRge eddy Simulation solvEr
A Cassagne, JF Boussuge, G Puigt
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