Gael Pillonnet
Gael Pillonnet
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Cryogenic subthreshold swing saturation in FD-SOI MOSFETs described with band broadening
H Bohuslavskyi, AGM Jansen, S Barraud, V Barral, M Cassé, L Le Guevel, ...
IEEE Electron Device Letters 40 (5), 784-787, 2019
19.2 A 110mK 295µW 28nm FDSOI CMOS Quantum Integrated Circuit with a 2.8 GHz Excitation and nA Current Sensing of an On-Chip Double Quantum Dot
L Le Guevel, G Billiot, X Jehl, S De Franceschi, M Zurita, Y Thonnart, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 306-308, 2020
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm …
P Vivet, E Guthmuller, Y Thonnart, G Pillonnet, G Moritz, I Miro-Panades, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 46-48, 2020
A shock-optimized SECE integrated circuit
A Morel, A Quelen, P Gasnier, R Grézaud, S Monfray, A Badel, G Pillonnet
IEEE Journal of Solid-State Circuits 53 (12), 3420-3433, 2018
A 0.01% THD, 70dB PSRR Single Ended Class D using variable hysteresis control for headphone amplifiers
G Pillonnet, N Abouchi, R Cellier, A Nagari
2009 IEEE International Symposium on Circuits and Systems, 1181-1184, 2009
Frequency tuning of piezoelectric energy harvesters thanks to a short-circuit synchronous electric charge extraction
A Morel, G Pillonnet, P Gasnier, E Lefeuvre, A Badel
Smart materials and structures 28 (2), 025009, 2018
Comparison between voltage and current driving methods of a micro-speaker
E Sturtzer, G Pillonnet, G Lemarquand, N Abouchi
Applied Acoustics 73 (11), 1087-1098, 2012
A 30nA quiescent 80nW-to-14mW power-range shock-optimized SECE-based piezoelectric harvesting interface with 420% harvested-energy improvement
A Quelen, A Morel, P Gasnier, R Grézaud, S Monfray, G Pillonnet
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 150-152, 2018
A 15-mV inductor-less start-up converter using a piezoelectric transformer for energy harvesting applications
T Martinez, G Pillonnet, F Costa
IEEE Transactions on Power Electronics 33 (3), 2241-2253, 2017
Adiabatic capacitive logic: a paradigm for low-power logic
G Pillonnet, H Fanet, S Houri
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
Strongly coupled piezoelectric cantilevers for broadband vibration energy harvesting
D Gibus, P Gasnier, A Morel, F Formosa, L Charleux, S Boisseau, ...
Applied Energy 277, 115518, 2020
Cryogenic characterization of 28-nm FD-SOI ring oscillators with energy efficiency optimization
H Bohuslavskyi, S Barraud, V Barral, M Casse, L Le Guevel, L Hutin, ...
IEEE Transactions on Electron Devices 65 (9), 3682-3688, 2018
A 2.5μW 0.0067mm2 automatic back-biasing compensation unit achieving 50% leakage reduction in FDSOI 28nm over 0.35-to-1V VDD range
A Quelen, G Pillonnet, P Flatresse, E Beigné
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 304-306, 2018
Efficiency comparison of inductor-, capacitor-, and resonant-based converters fully integrated in CMOS technology
Y Pascal, G Pillonnet
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (3 …, 2015
3D advanced integration technology for heterogeneous systems
P Vivet, C Bernard, F Clermidy, D Dutoit, E Guthmuller, IM Panadès, ...
2015 International 3D Systems Integration Conference (3DIC), FS6. 1-FS6. 3, 2015
A unified N-SECE strategy for highly coupled piezoelectric energy scavengers
A Morel, A Badel, Y Wanderoild, G Pillonnet
Smart Materials and Structures 27 (8), 084002, 2018
An integrated class D audio amplifier based on sliding mode control
G Pillonnet, R Cellier, N Abouchi, M Chiollaz
2008 IEEE International Conference on Integrated Circuit Design and …, 2008
32.2 self-tunable phase-shifted SECE piezoelectric energy-harvesting IC with a 30nW MPPT achieving 446% energy-bandwidth improvement and 94% efficiency
A Morel, A Quelen, CA Berlitz, D Gibus, P Gasnier, A Badel, G Pillonnet
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 488-490, 2020
Variability evaluation of 28nm FD-SOI technology at cryogenic temperatures down to 100mK for quantum computing
BC Paz, L Le Guevel, M Casse, G Billiot, G Pillonnet, AGM Jansen, ...
2020 IEEE Symposium on VLSI Technology, 1-2, 2020
Dielectric losses considerations for piezoelectric energy harvesting
A Morel, G Pillonnet, Y Wanderoild, A Badel
Journal of Low Power Electronics 14 (2), 244-254, 2018
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