| A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications JLA de Melo, F Querido, N Paulino, J Goes 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1340-1343, 2014 | 31 | 2014 |
| A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW JLA de Melo, J Goes, N Paulino VLSI Circuits (VLSI Circuits), 2015 Symposium on, C290-C291, 2015 | 30 | 2015 |
| Continuous-time delta-sigma modulators based on passive RC integrators JLA de Melo, N Paulino, J Goes IEEE Transactions on Circuits and Systems I: Regular Papers 65 (11), 3662-3674, 2018 | 28 | 2018 |
| Design methodology for sigma-delta modulators based on a genetic algorithm using hybrid cost functions JLA de Melo, B Nowacki, N Paulino, J Goes 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 301-304, 2012 | 25 | 2012 |
| A low power 1-MHz continuous-time ΣΔM Using a passive loop filter designed with a genetic algorithm tool JLA De Melo 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 586-589, 2013 | 21 | 2013 |
| Digital pixel test structures implemented in a 65 nm CMOS process GA Rinella, A Andronic, M Antonelli, M Aresti, R Baccomi, P Becht, ... Nuclear Instruments and Methods in Physics Research Section A: Accelerators …, 2023 | 19 | 2023 |
| Current mode sigma-delta modulator designed with the help of transistor’s size optimization tool P Śniatała, M Naumowicz, A Handkiewicz, S Szczęsny, JLA Melo, ... Bulletin of the Polish Academy of Sciences. Technical Sciences 63 (4), 919--922, 2015 | 16 | 2015 |
| A 0.9-V analog-to-digital acquisition channel for an IoT water management sensor node H Serra, I Bastos, JLA de Melo, JP Oliveira, N Paulino, E Nefzaoui, ... IEEE Transactions on Circuits and Systems II: Express Briefs 66 (10), 1678-1682, 2019 | 14 | 2019 |
| Strategic R&D; Programme on Technologies for Future Experiments-Annual Report 2020 G Aglieri, PV Leitao, J Hahnfeld, P Collins, D Janssens, L Martinazzoli, ... | 12 | 2020 |
| A compact front-end circuit for a monolithic sensor in a 65 nm cmos imaging technology F Piro, GA Rinella, A Andronic, M Antonelli, M Aresti, R Baccomi, P Becht, ... IEEE Transactions on Nuclear Science, 2023 | 9 | 2023 |
| Optimization of a 65 nm CMOS imaging process for monolithic CMOS sensors for high energy physics GA Rinella, A Andronic, M Antonelli, R Baccomi, R Ballabriga, M Barbero, ... POS PROCEEDINGS OF SCIENCE 420, 083-083, 2023 | 8 | 2023 |
| A systematic design methodology for optimization of sigma-delta modulators based on an evolutionary algorithm JLA de Melo, N Pereira, PV Leitão, N Paulino, J Goes IEEE Transactions on Circuits and Systems I: Regular Papers 66 (9), 3544-3556, 2019 | 7 | 2019 |
| A hybrid current-mode passive second-order continuous-time ΣΔ modulator P Śniatała, M Naumowicz, JLA de Melo, N Paulino, J Goes 2014 Proceedings of the 21st International Conference Mixed Design of …, 2014 | 7 | 2014 |
| Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology L Cecconi, F Piro, JLA de Melo, W Deng, GH Hong, W Snoeys, M Mager, ... Journal of Instrumentation 18 (02), C02025, 2023 | 6 | 2023 |
| Design of an analog monolithic pixel sensor prototype in TPSCo 65 nm CMOS imaging technology W Deng, GA Rinella, M Aresti, J Baudot, F Benotto, S Beole, W Bialas, ... Journal of Instrumentation 18 (01), C01065, 2023 | 5 | 2023 |
| Development of a Stitched Monolithic Pixel Sensor prototype (MOSS chip) towards the ITS3 upgrade of the ALICE Inner Tracking system PV Leitao, GA Rinella, S Bugiel, L Cecconi, JLA de Melo, G De Robertis, ... Journal of Instrumentation 18 (01), C01044, 2023 | 4 | 2023 |
| Charge sensing properties of monolithic CMOS pixel sensors fabricated in a 65 nm technology S Bugiel, A Dorokhov, M Aresti, J Baudot, S Beole, A Besson, R Bugiel, ... Nuclear Instruments and Methods in Physics Research Section A: Accelerators …, 2022 | 4 | 2022 |
| A 3rdorder 1.5-bit continuous-time (CT) Sigma-Delta (ΣΔ) modulator optimized for Class D audio power amplifier J de Melo, N Paulino Proceedings of the 17th International Conference Mixed Design of Integrated …, 2010 | 4 | 2010 |
| Design of a 3 rd Order 1.5-bit Continuous-Time (CT) Sigma-Delta (Σ∆) Modulator Optimized for Class D Audio Power Amplifier J de Melo, N Paulino | 4* | 2010 |
| A simple class-D audio power amplifier using a passive CT ΣΔ modulator for medium quality sound systems JLA de Melo, PV Leitão, J Goes, N Paulino 2015 22nd International Conference Mixed Design of Integrated Circuits …, 2015 | 1 | 2015 |
Nuno PaulinoDEEC FCT/UNL - UNINOVA CTSAdresse e-mail validée de uninova.pt
