Toward increasing FPGA lifetime S Srinivasan, R Krishnan, P Mangalagiri, Y Xie, V Narayanan, MJ Irwin, ...
IEEE Transactions on Dependable and Secure Computing 5 (2), 115-127, 2008
111 2008 A low-power phase change memory based hybrid cache architecture P Mangalagiri, K Sarpatwari, A Yanamandra, VK Narayanan, Y Xie, ...
Proceedings of the 18th ACM Great Lakes symposium on VLSI, 395-398, 2008
85 2008 FLAW: FPGA lifetime awareness S Srinivasan, P Mangalagiri, Y Xie, N Vijaykrishnan, K Sarpatwari
Proceedings of the 43rd annual Design Automation Conference, 630-635, 2006
74 2006 Extracting the Richardson constant: K Sarpatwari, OO Awadelkarim, MW Allen, SM Durbin, SE Mohney
Applied physics letters 94 (24), 242110, 2009
45 2009 Temperature-dependent properties of nearly ideal ZnO Schottky diodes MW Allen, X Weng, JM Redwing, K Sarpatwari, SE Mohney, ...
IEEE transactions on electron devices 56 (9), 2160-2164, 2009
41 2009 Effects of barrier height inhomogeneities on the determination of the Richardson constant K Sarpatwari, SE Mohney, OO Awadelkarim
Journal of Applied Physics 109 (1), 014510, 2011
27 2011 Comprehensive understanding on the role of tunnel oxide top nitridation for the reliability of nanoscale flash memory T Kim, K Sarpatwari, S Koka, H Wang
IEEE Electron Device Letters 34 (3), 396-398, 2013
19 2013 Extracting the Schottky barrier height from axial contacts to semiconductor nanowires K Sarpatwari, NS Dellas, OO Awadelkarim, SE Mohney
Solid-state electronics 54 (7), 689-695, 2010
19 2010 Tunnel Oxide Nitridation Effect on the Evolution of T Kim, D He, K Morinville, K Sarpatwari, B Millemon, A Goda, J Kessenich
IEEE electron device letters 32 (8), 999-1001, 2011
15 2011 Modified three terminal charge pumping technique applied to vertical transistor structures LJ Passmore, K Sarpatwari, SA Suliman, OO Awadelkarim, R Ridley, ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2005
14 2005 Toward understanding the electrical properties of metal/semiconductor Schottky contacts: The effects of barrier inhomogeneities and geometry in bulk and nanoscale structures K Sarpatwari
The Pennsylvania State University, 2009
12 2009 Disturb verify for programming memory cells K Sarpatwari, A Goda
US Patent 8,638,607, 2014
11 2014 Voltage stabilizing for a memory cell array K Sarpatwari, H Wang, R Sanjay
US Patent 9,196,357, 2015
9 2015 Fowler–Nordheim and hot carrier reliabilities of U-shaped trench-gated transistors studied by three terminal charge pumping LJ Passmore, K Sarpatwari, SA Suliman, OO Awadelkarim, R Ridley, ...
Thin solid films 504 (1-2), 302-306, 2006
8 2006 Analysis of current–voltage–temperature characteristics in SiC Schottky diodes using threshold-accepting simulated-annealing techniques K Sarpatwari, L Passmore, SA Suliman, OO Awadelkarim
Solid-state electronics 51 (5), 644-649, 2007
6 2007 Minority carrier injection limited current in Re/4H‐SiC Schottky diodes K Sarpatwari, SE Mohney, S Ashok, OO Awadelkarim
physica status solidi (a) 207 (6), 1509-1513, 2010
5 2010 Read refresh operation F Pellizzer, K Sarpatwari, I Tortorelli, NN Gajera
US Patent 11,139,016, 2021
3 2021 Techniques for applying multiple voltage pulses to select a memory cell JT Hamada, M Cui, JM McCrate, K Sarpatwari, J Chen
US Patent 10,867,671, 2020
3 2020 Methods for generating random data using phase change materials and related devices and systems K Sarpatwari, H Wang, S Rangan
US Patent 9,575,727, 2017
3 2017 Accessing a multi-level memory cell K Sarpatwari, XA Tran, J Chen, JA Durand, NN Gajera, YC Lee
US Patent 11,355,209, 2022
2 2022 