Follow
Hooman Jarollahi, Ph.D.
Title
Cited by
Cited by
Year
Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks
H Jarollahi, V Gripon, N Onizawa, WJ Gross
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (4), 642-653, 2015
502015
A Nonvolatile Associative Memory-Based Context-Driven Search Engine Using 90 nm CMOS/MTJ-Hybrid Logic-in-Memory Architecture
H Jarollahi, N Onizawa, V Gripon, N Sakimura, T Sugibayashi, T Endoh, ...
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS …, 2014
492014
Architecture and implementation of an associative memory using sparse clustered networks
H Jarollahi, N Onizawa, V Gripon, WJ Gross
IEEE International Symposium on Circuits and Systems (ISCAS), 2901-2904, 2012
412012
A Low-Power Content-Addressable-Memory Based on Clustered-Sparse-Networks
H Jarollahi, V Gripon, N Onizwa, WJ Gross
The 24th IEEE International Conference on Application-specific Systems …, 2013
312013
Reduced-Complexity Binary-Weight-Coded Associative Memories
H Jarollahi, N Onizawa, V Gripon, WJ Gross
The 38th IEEE International Conference on Acoustics, Speech, and Signal …, 2013
282013
SRAM cell with common bit line and source line standby voltage
RF Hobson, H Jarollahi
US Patent 8,503,221, 2013
202013
Hardware implementation of associative memories based on multiple-valued sparse clustered networks
N Onizawa, H Jarollahi, T Hanyu, WJ Gross
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 (1 …, 2016
162016
Algorithm and implementation of an associative memory for oriented edge detection using improved clustered neural networks
R Danilo, H Jarollahi, V Gripon, P Coussy, L Conde-Canencia, WJ Gross
IEEE International Symposium on Circuits and Systems (ISCAS), 2501-2504, 2015
152015
Algorithm and Architecture of Fully-Parallel Associative Memories Based on Sparse Clustered Networks
H Jarollahi, N Onizawa, V Gripon, WJ Gross
Journal of Signal Processing Systems 76 (3), 235-247, 2014
142014
Selective Decoding in Associative Memories Based on Sparse-Clustered Networks
H Jarollahi, N Onizawa, WJ Gross
IEEE Global Conference on Signal and Information Processing (GlobalSIP …, 2013
112013
Associative Memories Based on Multiple-Valued Sparse Clustered Networks
H Jarollahi, N Onizawa, T Hanyu, WJ Gross
Proceedings of IEEE International Symposium on Multiple-Valued Logic (ISMVL …, 2014
62014
Algorithm and architecture for a multiple-field context-driven search engine using fully-parallel clustered associative memories
H Jarollahi, N Onizawa, V Gripon, T Hanyu, WJ Gross
2014 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2014
52014
Power and area efficient 5T-SRAM with improved performance for low-power SoC in 65nm CMOS
H Jarollahi, RF Hobson
The 53rd IEEE International Midwest Symposium on Circuits and Systems …, 2010
42010
Dynamic Power Reduction in a Novel CMOS 5T-SRAM for Low-Power SoC
H Jarollahi, RF Hobson
2010 International Conference on Computer Design (CDES), 169-175, 2010
12010
VLSI implementation of associative memories based on sparse clustered networks
H Jarollahi
Department of Electrical and Computer Engineering, McGill University, 2015
2015
Development of an area-efficient and low-power five-transistor SRAM for low-power SoC
H Jarollahi
School of Engineering Science, Simon Fraser University, 2010
2010
The system can't perform the operation now. Try again later.
Articles 1–16