Nuno Roma
Nuno Roma
INESC-ID, Instituto Superior Técnico, Universidade de Lisboa
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Efficient and configurable full-search block-matching processors
N Roma, L Sousa
IEEE Transactions on Circuits and Systems for Video Technology 12 (12), 1160 …, 2002
Efficient hybrid DCT-domain algorithm for video spatial downscaling
N Roma, L Sousa
EURASIP Journal on Advances in Signal Processing 2007 (1), 057291, 2007
Dynamic load balancing for real-time video encoding on heterogeneous CPU+ GPU systems
S Momcilovic, A Ilic, N Roma, L Sousa
IEEE Transactions on Multimedia 16 (1), 108-121, 2013
Low-power array architectures for motion estimation
L Sousa, N Roma
1999 IEEE Third Workshop on Multimedia Signal Processing (Cat. No. 99TH8451 …, 1999
A tutorial overview on the properties of the discrete cosine transform for encoded image and video processing
N Roma, L Sousa
Signal Processing 91 (11), 2443-2464, 2011
A comparative analysis of cross-correlation matching algorithms using a pyramidal resolution approach
N Roma, J Santos-Victor, J Tomé
Empirical Evaluation Methods in Computer Vision, 117-142, 2002
Adaptive motion estimation processor for autonomous video devices
T Dias, S Momcilovic, N Roma, L Sousa
EURASIP Journal on Embedded Systems 2007, 1-10, 2007
Cooperative CPU+ GPU deblocking filter parallelization for high performance HEVC video codecs
DF De Souza, N Roma, L Sousa
2014 IEEE International Conference on Acoustics, Speech and Signal …, 2014
An asip approach for adaptive avc motion estimation
S Momcilovic, N Roma, L Sousa
2007 Ph. D Research in Microelectronics and Electronics Conference, 165-168, 2007
p264: Open platform for designing parallel H. 264/AVC video encoders on multi-core systems
A Rodrigues, N Roma, L Sousa
Proceedings of the 20th international workshop on Network and operating …, 2010
Multicore SIMD ASIP for next-generation sequencing and alignment biochip platforms
N Neves, N Sebastião, D Matos, P Tomás, P Flores, N Roma
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (7 …, 2014
GPGPU power modeling for multi-domain voltage-frequency scaling
J Guerreiro, A Ilic, N Roma, P Tomas
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
GHEVC: An efficient HEVC decoder for graphics processing units
DF de Souza, A Ilic, N Roma, L Sousa
IEEE Transactions on Multimedia 19 (3), 459-474, 2016
High performance multi-standard architecture for DCT computation in H. 264/AVC high profile and HEVC codecs
T Dias, N Roma, L Sousa
2013 Conference on Design and Architectures for Signal and Image Processing …, 2013
Transparent application acceleration by intelligent scheduling of shared library calls on heterogeneous systems
J Colaço, A Matoga, A Ilic, N Roma, P Tomás, R Chaves
International Conference on Parallel Processing and Applied Mathematics, 693-703, 2013
Customisable core-based architectures for real-time motion estimation on FPGAs
N Roma, T Dias, L Sousa
International Conference on Field Programmable Logic and Applications, 745-754, 2003
Multi-kernel auto-tuning on GPUs: Performance and energy-aware optimization
J Guerreiro, A Ilic, N Roma, P Tomás
2015 23rd Euromicro International Conference on Parallel, Distributed, and …, 2015
BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment
N Neves, N Sebastiao, A Patricio, D Matos, P Tomás, P Flores, N Roma
2013 IEEE 24th International Conference on Application-Specific Systems …, 2013
Multi-level parallelization of advanced video coding on hybrid CPU+ GPU platforms
S Momcilovic, N Roma, L Sousa
European Conference on Parallel Processing, 165-174, 2012
A parallel programming framework for multi-core DNA sequence alignment
TJBM de Almeida, NFV Roma
2010 International Conference on Complex, Intelligent and Software Intensive …, 2010
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