Novel error mode analysis method for graphoepitaxial directed self-assembly lithography based on the dissipative particle dynamics method K Kodera, S Maeda, S Tanaka, S Mimotogi, Y Seino, H Yonemitsu, H Sato, ... Alternative Lithographic Technologies V 8680, 222-228, 2013 | 32 | 2013 |
Dissipative particle dynamics simulations to optimize contact hole shrink process using graphoepitaxial directed self-assembly H Sato, H Yonemitsu, Y Seino, H Kato, M Kanno, K Kobayashi, ... Alternative Lithographic Technologies V 8680, 352-357, 2013 | 22 | 2013 |
Directed self-assembly lithography using coordinated line epitaxy (COOL) process Y Seino, Y Kasahara, H Sato, K Kobayashi, H Kubota, S Minegishi, ... Alternative Lithographic Technologies VII 9423, 238-244, 2015 | 20 | 2015 |
Dispersive lineshape of the resistively‐detected NMR in the vicinity of Landau level filling ν= 1 K Kodera, H Takado, A Endo, S Katsumoto, Y Iye physica status solidi c 3 (12), 4380-4383, 2006 | 20 | 2006 |
A novel simple sub-15 nm line-and-space patterning process flow using directed self-assembly technology Y Seino, Y Kasahara, H Sato, K Kobayashi, K Miyagi, S Minegishi, ... Microelectronic Engineering 134, 27-32, 2015 | 18 | 2015 |
Mask-layout creating method, apparatus therefor, and computer program product K Kodera, C Kodama US Patent 8,336,006, 2012 | 18 | 2012 |
Pattern evaluating method, pattern generating method, and computer program product K Kodera, S Tanaka, T Kotani, S Nojima, S Inoue US Patent App. 12/836,235, 2011 | 11 | 2011 |
RIE challenges for sub-15 nm line-and-space patterning using directed self-assembly lithography with coordinated line epitaxy (COOL) process Y Kasahara, Y Seino, K Kobayashi, H Kanai, H Sato, H Kubota, T Tobana, ... Advanced Etch Technology for Nanopatterning IV 9428, 124-130, 2015 | 9 | 2015 |
Sub-10-nm patterning process using directed self-assembly with high block copolymers N Kihara, Y Seino, H Sato, Y Kasahara, K Kobayashi, K Miyagi, ... Journal of Micro/Nanolithography, MEMS, and MOEMS 14 (2), 023502-023502, 2015 | 8 | 2015 |
Electrical yield verification of half-pitch 15 nm patterns using directed self-assembly of polystyrene-block-poly (methyl methacrylate) T Azuma, Y Seino, H Sato, Y Kasahara, K Kobayashi, H Kubota, H Kanai, ... Journal of Vacuum Science & Technology B 33 (6), 2015 | 7 | 2015 |
Characterization of half-pitch 15-nm metal wire circuit fabricated by directed self-assembly of polystyrene-block-poly (methyl methacrylate) Y Kasahara, Y Seino, H Sato, H Kanai, K Kobayashi, H Kubota, K Miyagi, ... Microelectronic Engineering 159, 21-26, 2016 | 6 | 2016 |
A Simulation Study on Defectivity in Directed Self-assembly Lithography K Kodera, H Kanai, H Sato, Y Seino, K Kobayashi, Y Kasahara, H Kubota, ... Journal of Photopolymer Science and Technology 28 (5), 683-688, 2015 | 6 | 2015 |
Defect-aware process margin for chemo-epitaxial directed self-assembly lithography using simulation method based on self-consistent field theory K Kodera, H Sato, H Kanai, Y Seino, N Kihara, Y Kasahara, K Kobayashi, ... Alternative Lithographic Technologies VI 9049, 458-465, 2014 | 6 | 2014 |
Pattern generating method, manufacturing method of mask, and manufacturing method of semiconductor device K Kodera, S Tanaka, T Kotani, S Inoue US Patent App. 12/874,756, 2011 | 6 | 2011 |
Novel fine-tuned model-based SRAF generation method using coherence map K Kodera, S Tanaka, M Yamaji, C Kodama, T Kotani, S Nojima, ... Optical Microlithography XXIII 7640, 453-461, 2010 | 6 | 2010 |
Patterning strategy and performance of 1.3 NA tool for 32nm node lithography S Mimotogi, M Satake, Y Kitamura, K Takahata, K Kodera, H Fujise, ... Optical Microlithography XXI 6924, 206-214, 2008 | 5 | 2008 |
Process and simulation studies of contact holes fabricated using directed self-assembly lithography H Yonemitsu 2012 MRS Fall Meeting and Exhibit, 2012 | 4 | 2012 |
Sub-30 nm contact hole process study using directed self-assembly lithography H Yonemitsu 25th International Microprocesses and Nanotechnology Conference (MNC2012), 2012 | 4 | 2012 |
Evaluation pattern generating method, computer program product, and pattern verifying method K Kodera, S Tanaka, S Maeda, S Kyoh, S Inoue, R Ogawa US Patent App. 12/536,900, 2010 | 4 | 2010 |
A simulation study for defects in sub-15 nm line-space using directed self-assembly H Kanai, K Kodera, Y Seino, H Sato, Y Kasahara, K Kobayashi, K Miyagi, ... MRS Online Proceedings Library (OPL) 1750, mrsf14-1750-kk05-18, 2015 | 3 | 2015 |