elisa vianello
elisa vianello
Scientist, CEA Leti
Adresse e-mail validée de cea.fr
Citée par
Citée par
Bio-inspired stochastic computing using binary CBRAM synapses
M Suri, D Querlioz, O Bichler, G Palma, E Vianello, D Vuillaume, ...
IEEE Transactions on Electron Devices 60 (7), 2402-2409, 2013
Prototype ATLAS IBL modules using the FE-I4A front-end readout chip
Atlas Ibl Collaboration
Journal of Instrumentation 7 (11), P11010, 2012
HfO2-Based OxRAM Devices as Synapses for Convolutional Neural Networks
D Garbin, E Vianello, O Bichler, Q Rafhay, C Gamrat, G Ghibaudo, ...
IEEE Transactions on Electron Devices 62 (8), 2494-2501, 2015
CBRAM devices as binary synapses for low-power stochastic neuromorphic systems: auditory (cochlea) and visual (retina) cognitive processing applications
M Suri, O Bichler, D Querlioz, G Palma, E Vianello, D Vuillaume, ...
2012 International Electron Devices Meeting, 10.3. 1-10.3. 4, 2012
3D silicon sensors: Design, large area production and quality assurance for the ATLAS IBL pixel detector upgrade
C Da Via, M Boscardin, GF Dalla Betta, G Darbo, C Fleta, C Gemme, ...
Nuclear Instruments and Methods in Physics Research Section A: Accelerators …, 2012
Resistive memories for ultra-low-power embedded computing design
E Vianello, O Thomas, G Molas, O Turkyilmaz, N Jovanović, D Garbin, ...
2014 IEEE International Electron Devices Meeting, 6.3. 1-6.3. 4, 2014
Variability-tolerant convolutional neural network for pattern recognition applications based on OxRAM synapses
D Garbin, O Bichler, E Vianello, Q Rafhay, C Gamrat, L Perniola, ...
2014 IEEE international electron devices meeting, 28.4. 1-28.4. 4, 2014
HfO2-Based RRAM: Electrode Effects, Ti/HfO2 Interface, Charge Injection, and Oxygen (O) Defects Diffusion Through Experiment and Ab Initio Calculations
B Traoré, P Blaise, E Vianello, L Perniola, B De Salvo, Y Nishi
IEEE Transactions on Electron Devices 63 (1), 360-368, 2015
Understanding RRAM endurance, retention and window margin trade-off using experimental results and simulations
C Nail, G Molas, P Blaise, G Piccolboni, B Sklenard, C Cagli, M Bernard, ...
2016 IEEE International Electron Devices Meeting (IEDM), 4.5. 1-4.5. 4, 2016
Development of double-sided full-passing-column 3D sensors at FBK
G Giacomini, A Bagolini, M Boscardin, GF Dalla Betta, F Mattedi, M Povoli, ...
IEEE Transactions on Nuclear Science 60 (3), 2357-2366, 2013
Spiking neural networks hardware implementations and challenges: A survey
M Bouvier, A Valentian, T Mesquida, F Rummens, M Reyboz, E Vianello, ...
ACM Journal on Emerging Technologies in Computing Systems (JETC) 15 (2), 1-35, 2019
On the Origin of Low-Resistance State Retention Failure in HfO2-Based RRAM and Impact of Doping/Alloying
B Traoré, P Blaise, E Vianello, H Grampeix, S Jeannot, L Perniola, ...
IEEE Transactions on Electron Devices 62 (12), 4029-4036, 2015
Slim edges in double-sided silicon 3D detectors
M Povoli, A Bagolini, M Boscardin, GF Dalla Betta, G Giacomini, ...
Journal of Instrumentation 7 (01), C01015, 2012
Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication
HY Chen, S Brivio, CC Chang, J Frascaroli, TH Hou, B Hudec, M Liu, H Lv, ...
Journal of Electroceramics 39 (1), 21-38, 2017
Experimental characterization of the vertical position of the trapped charge in Si nitride-based nonvolatile memory cells
A Arreghini, F Driussi, E Vianello, D Esseni, MJ van Duuren, ...
IEEE Transactions on Electron Devices 55 (5), 1211-1219, 2008
3D Sequential Integration: Application-driven technological achievements and guidelines
P Batude, L Brunet, C Fenouillet-Beranger, F Andrieu, JP Colinge, ...
2017 IEEE International Electron Devices Meeting (IEDM), 3.1. 1-3.1. 4, 2017
Experimental and simulation analysis of program/retention transients in silicon nitride-based NVM cells
E Vianello, F Driussi, A Arreghini, P Palestri, D Esseni, L Selmi, N Akil, ...
IEEE transactions on electron devices 56 (9), 1980-1990, 2009
A Combined Ab Initio and Experimental Study on the Nature of Conductive Filaments in Resistive Random Access Memory
KH Xue, B Traore, P Blaise, LRC Fonseca, E Vianello, G Molas, ...
IEEE Transactions on Electron Devices 61 (5), 1394-1402, 2014
Grain boundary composition and conduction in : An ab initio study
KH Xue, P Blaise, LRC Fonseca, G Molas, E Vianello, B Traoré, ...
Applied Physics Letters 102 (20), 201908, 2013
Explanation of the charge trapping properties of silicon nitride storage layers for NVMs—Part II: Atomistic and electrical modeling
E Vianello, F Driussi, P Blaise, P Palestri, D Esseni, L Perniola, G Molas, ...
IEEE transactions on electron devices 58 (8), 2490-2499, 2011
Le système ne peut pas réaliser cette opération maintenant. Veuillez réessayer plus tard.
Articles 1–20