| Lowering the error floor of turbo codes with CRC verification T Tonnellier, C Leroux, B Le Gal, B Gadat, C Jego, N Van Wambeke IEEE Wireless Communications Letters 5 (4), 404-407, 2016 | 15 | 2016 |
| Beyond Gbps turbo decoder on multi-core CPUs A Cassagne, T Tonnellier, C Leroux, B Le Gal, O Aumage, D Barthou 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 14 | 2016 |
| Neural belief propagation decoding of CRC-polar concatenated codes N Doan, SA Hashemi, EN Mambou, T Tonnellier, WJ Gross ICC 2019-2019 IEEE International Conference on Communications (ICC), 1-6, 2019 | 12 | 2019 |
| Fast simulation and prototyping with AFF3CT A Cassagne, O Hartmann, M Leonardon, T Tonnellier, G Delbergue, ... | 7 | 2017 |
| Fast decoding of multi-kernel polar codes A Cavatassi, T Tonnellier, WJ Gross 2019 IEEE Wireless Communications and Networking Conference (WCNC), 1-6, 2019 | 2 | 2019 |
| Energy-Efficient Hardware Architectures for Fast Polar Decoders F Ercan, T Tonnellier, WJ Gross IEEE Transactions on Circuits and Systems I: Regular Papers, 2019 | 1 | 2019 |
| Operation merging for hardware implementations of fast polar decoders F Ercan, T Tonnellier, C Condo, WJ Gross Journal of Signal Processing Systems 91 (9), 995-1007, 2019 | 1 | 2019 |
| Neural dynamic successive cancellation flip decoding of polar codes N Doan, SA Hashemi, F Ercan, T Tonnellier, W Gross arXiv preprint arXiv:1907.11563, 2019 | 1 | 2019 |
| AFF3CT: A Fast Forward Error Correction Toolbox! A Cassagne, O Hartmann, M Leonardon, K He, C Leroux, R Tajan, ... SoftwareX 10, 100345, 2019 | 1 | 2019 |
| Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes A Cavatassi, T Tonnellier, WJ Gross ICC 2019 - 2019 IEEE International Conference on Communications (ICC …, 2019 | 1 | 2019 |
| Length-compatible polar codes: a survey T Tonnellier, A Cavatassi, WJ Gross 2019 53rd Annual Conference on Information Sciences and Systems (CISS), 1-6, 2019 | 1 | 2019 |
| Hardware architecture for lowering the error floor of LTE turbo codes T Tonnellier, C Leroux, B Le Gal, C Jego, B Gadat, N Van Wambeke 2016 Conference on Design and Architectures for Signal and Image Processing …, 2016 | 1 | 2016 |
| Lowering the error floor of double-binary turbo codes: The flip and check algorithm T Tonnellier, C Leroux, B Le Gal, C Jego, B Gadat, N Van Wambeke 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 1 | 2016 |
| Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes SA Hashemi, N Doan, T Tonnellier, WJ Gross arXiv preprint arXiv:1912.01086, 2019 | | 2019 |
| Efficient Flicker-Free FEC Codes using Knuth's Balancing Algorithm for VLC EN Mambou, T Tonnellier, SA Hashemi, WJ Gross arXiv preprint arXiv:1908.05798, 2019 | | 2019 |
| Contribution à l’amélioration des performances de décodage des turbo codes: algorithmes et architecture T Tonnellier Université de Bordeaux, 2017 | | 2017 |
| AFF3CT: Un environnement de simulation pour le codage de canal A Cassagne, M Leonardon, O Hartmann, T Tonnellier, G Delbergue, ... | | 2017 |
| Extension du principe Self-Corrected de l’information extrinsèque au décodage itératif de Turbo Codes T Tonnellier, C Leroux, B Le Gal, C Jégo, B Gadat, C Poulliat GRETSI, 2015 | | 2015 |
Bertrand Le GalMaitre de conférences, Université de BordeauxAdresse e-mail validée de ims-bordeaux.fr
