| Neural belief propagation decoding of CRC-polar concatenated codes N Doan, SA Hashemi, EN Mambou, T Tonnellier, WJ Gross ICC 2019-2019 IEEE International Conference on Communications (ICC), 1-6, 2019 | 25 | 2019 |
| Lowering the error floor of turbo codes with CRC verification T Tonnellier, C Leroux, B Le Gal, B Gadat, C Jego, N Van Wambeke IEEE Wireless Communications Letters 5 (4), 404-407, 2016 | 18 | 2016 |
| Beyond Gbps turbo decoder on multi-core CPUs A Cassagne, T Tonnellier, C Leroux, B Le Gal, O Aumage, D Barthou 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 15 | 2016 |
| Fast simulation and prototyping with AFF3CT A Cassagne, O Hartmann, M Leonardon, T Tonnellier, G Delbergue, ... | 10 | 2017 |
| Energy-efficient hardware architectures for fast polar decoders F Ercan, T Tonnellier, WJ Gross IEEE Transactions on Circuits and Systems I: Regular Papers 67 (1), 322-335, 2019 | 7 | 2019 |
| Neural dynamic successive cancellation flip decoding of polar codes N Doan, SA Hashemi, F Ercan, T Tonnellier, WJ Gross 2019 IEEE International Workshop on Signal Processing Systems (SiPS), 272-277, 2019 | 5 | 2019 |
| Fast decoding of multi-kernel polar codes A Cavatassi, T Tonnellier, WJ Gross 2019 IEEE Wireless Communications and Networking Conference (WCNC), 1-6, 2019 | 5 | 2019 |
| Simplified Dynamic SC-Flip Polar Decoding F Ercan, T Tonnellier, N Doan, WJ Gross ICASSP 2020-2020 IEEE International Conference on Acoustics, Speech and …, 2020 | 3 | 2020 |
| AFF3CT: A Fast Forward Error Correction Toolbox! A Cassagne, O Hartmann, M Leonardon, K He, C Leroux, R Tajan, ... SoftwareX 10, 100345, 2019 | 3 | 2019 |
| Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes A Cavatassi, T Tonnellier, WJ Gross ICC 2019 - 2019 IEEE International Conference on Communications (ICC …, 2019 | 3 | 2019 |
| Length-compatible polar codes: a survey T Tonnellier, A Cavatassi, WJ Gross 2019 53rd Annual Conference on Information Sciences and Systems (CISS), 1-6, 2019 | 3 | 2019 |
| Operation merging for hardware implementations of fast polar decoders F Ercan, T Tonnellier, C Condo, WJ Gross Journal of Signal Processing Systems 91 (9), 995-1007, 2019 | 2 | 2019 |
| Hardware architecture for lowering the error floor of LTE turbo codes T Tonnellier, C Leroux, B Le Gal, C Jego, B Gadat, N Van Wambeke 2016 Conference on Design and Architectures for Signal and Image Processing …, 2016 | 1 | 2016 |
| Lowering the error floor of double-binary turbo codes: The flip and check algorithm T Tonnellier, C Leroux, B Le Gal, C Jego, B Gadat, N Van Wambeke 2016 9th International Symposium on Turbo Codes and Iterative Information …, 2016 | 1 | 2016 |
| High-Throughput VLSI Architecture for GRAND SM Abbas, T Tonnellier, F Ercan, WJ Gross 2020 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2020 | | 2020 |
| Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation F Ercan, T Tonnellier, N Doan, WJ Gross IEEE Transactions on Signal Processing 68, 5441-5456, 2020 | | 2020 |
| Method and apparatus for wirelessly communicating over a noisy channel with a variable codeword length polar code to improve transmission capacity WJ Gross, AC Cavatassi, T Tonnellier, Y Ge US Patent App. 16/569,813, 2020 | | 2020 |
| Efficient Flicker-Free FEC Codes Using Knuth's Balancing Algorithm for VLC EN Mambou, T Tonnellier, SA Hashemi, WJ Gross 2019 IEEE Global Communications Conference (GLOBECOM), 1-6, 2019 | | 2019 |
| Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes SA Hashemi, N Doan, T Tonnellier, WJ Gross 2019 53rd Asilomar Conference on Signals, Systems, and Computers, 532-536, 2019 | | 2019 |
| Contribution à l’amélioration des performances de décodage des turbo codes: algorithmes et architecture T Tonnellier Université de Bordeaux, 2017 | | 2017 |
Warren GrossProfessor of Electrical and Computer Engineering, McGill UniversityAdresse e-mail validée de mcgill.ca
