niranjan soundararajan
niranjan soundararajan
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Mechanisms for bounding vulnerabilities of processor structures
NK Soundararajan, A Parashar, A Sivasubramaniam
Proceedings of the 34th annual international symposium on Computer …, 2007
Quantized AVF: A means of capturing vulnerability variations over small windows of time
A Biswas, N Soundararajan, SS Mukherjee, S Gurumurthi
IEEE workshop on silicon errors in logic-system effects, 2009
GemDroid: A framework to evaluate mobile platforms
N Chidambaram Nachiappan, P Yedlapalli, N Soundararajan, ...
ACM SIGMETRICS Performance Evaluation Review 42 (1), 355-366, 2014
Polymorphic stacked dram memory architecture
J Chung, N Soundararajan
US Patent App. 13/036,839, 2012
Domain knowledge based energy management in handhelds
NC Nachiappan, P Yedlapalli, N Soundararajan, A Sivasubramaniam, ...
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
Vip: virtualizing ip chains on handheld platforms
NC Nachiappan, H Zhang, J Ryoo, N Soundararajan, ...
Proceedings of the 42Nd Annual International Symposium on Computer …, 2015
Dynamic power budgeting for mobile systems running graphics workloads
U Gupta, R Ayoub, M Kishinevsky, D Kadjo, N Soundararajan, U Tursun, ...
IEEE Transactions on Multi-Scale Computing Systems 4 (1), 30-40, 2017
Short-circuiting memory traffic in handheld platforms
P Yedlapalli, NC Nachiappan, N Soundararajan, A Sivasubramaniam, ...
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 166-177, 2014
Optimizing power and performance for reliable on-chip networks
A Yanamandra, S Eachempati, N Soundararajan, V Narayanan, MJ Irwin, ...
2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 431-436, 2010
Efficient tag storage for large data caches
J Chung, N Soundararajan
US Patent App. 13/104,865, 2012
Detecting architectural vulnerability of processor resources
A Biswas, N Soundararajan, S Mukherjee
US Patent 7,849,387, 2010
Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures
N Soundararajan, N Vijaykrishnan, A Sivasubramaniam
Proceedings of the 2008 international symposium on Low Power Electronics …, 2008
Characterizing the soft error vulnerability of multicores running multithreaded applications
N Soundararajan, A Sivasubramaniam, V Narayanan
ACM SIGMETRICS Performance Evaluation Review 38 (1), 379-380, 2010
Twig: Profile-guided btb prefetching for data center applications
TA Khan, N Brown, A Sriraman, NK Soundararajan, R Kumar, J Devietti, ...
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
Towards resilient micro-architectures: Datapath reliability enhancement using STT-MRAM
K Swaminathan, R Mukundrajan, N Soundararajan, V Narayanan
2011 IEEE Computer Society Annual Symposium on VLSI, 236-241, 2011
Memory in processor-supercomputer on a chip: processor design and execution semantics for massive single-chip performance
N Venkateswaran, A Shriraman, N Soundararajan
19th IEEE International Parallel and Distributed Processing Symposium, 8 pp., 2005
Pdede: Partitioned, deduplicated, delta branch target buffer
NK Soundararajan, P Braun, TA Khan, B Kasikci, H Litz, S Subramoney
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
Branch predictor with empirical branch bias override
NK Soundararajan, S Subramoney, R Pal, R Natarajan
US Patent 10,423,422, 2019
User-aware frame rate management in Android Smartphones
B Egilmez, M Schuchhardt, G Memik, R Ayoub, N Soundararajan, ...
ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-17, 2017
Memory in processor: Evolution of a novel supercomputer architecture
N Venkateswaran, A Shriraman, A Krishnan, N Soundararajan, S Srinivas
MEDEA Workshop PACT, IEEE and ACM SIGARCH 10 (1152923.1024298), 2003
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