| Cache Locking Content Selection Algorithms for ARINC-653 Compliant RTOS A Torres AD, JB Lefoul, FG De Magalhaes, D Assal, G Nicolescu ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 76, 2019 | 6* | 2019 |
| Simulator-based framework towards improved cache predictability for multi-core avionic systems JB Lefoul, ATA Dugo, F Magalhaes, G Nicolescu, D Assal, N Ulysse 2020 Spring Simulation Conference (SpringSim), 1-12, 2020 | 3 | 2020 |
| Efficient Scheduling, Mapping and Memory Bandwidth Allocation for Safety-Critical Systems ATA Dugo, JB Lefoul, A Ben-Salem, S Harnois, FG de Magalhaes, ... 2022 20th IEEE Interregional NEWCAS Conference (NEWCAS), 342-346, 2022 | 1 | 2022 |
| Certifiable Memory Management System for Safety Critical Partitioned System ATA Dugo, JB Lefoul, S Harnois, FG de Magalhaes, G Nicolescu ERTS2022, 2022 | 1 | 2022 |
| QEMTrace: a multi-platform memory tracer based on system emulation ATA Dugo, JB Lefoul, FG de Magalhães, G Nicolescu, D Assal Proceedings of the 2020 Summer Simulation Conference, 1-12, 2020 | 1 | 2020 |
| On the benchmarking of partitioned real-time systems FG de Magalhaes, ATA Dugo, JB Lefoul, G Nicolescu arXiv preprint arXiv:2007.10794, 2020 | 1 | 2020 |
| Cache Predictability and Performance Improvement in ARINC-653 Compliant Systems A Torres AD Polytechnique Montréal, 2019 | | 2019 |
| Software cache coherency support on Karlay many-core architecture A Torres AD, F Pétrot | | 2016 |
Jean-Baptiste LefoulPhD Student, Polytechnique MontréalVerified email at polymtl.ca
