| When clocks fail: On critical paths and clock faults M Agoyan, JM Dutertre, D Naccache, B Robisson, A Tria International Conference on Smart Card Research and Advanced Applications …, 2010 | 162 | 2010 |
| Electromagnetic transient faults injection on a hardware and a software implementations of AES A Dehbaoui, JM Dutertre, B Robisson, A Tria 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 7-15, 2012 | 156 | 2012 |
| Fault model analysis of laser-induced faults in sram memory cells C Roscian, A Sarafianos, JM Dutertre, A Tria 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 89-98, 2013 | 78 | 2013 |
| Injection of transient faults using electromagnetic pulses-Practical results on a cryptographic system-. A Dehbaoui, JM Dutertre, B Robisson, P Orsatelli, P Maurine, A Tria IACR Cryptology EPrint Archive 2012, 123, 2012 | 64 | 2012 |
| How to flip a bit? M Agoyan, JM Dutertre, AP Mirbaha, D Naccache, AL Ribotta, A Tria 2010 IEEE 16th International On-Line Testing Symposium, 235-239, 2010 | 63 | 2010 |
| Efficiency of a glitch detector against electromagnetic fault injection L Zussa, A Dehbaoui, K Tobich, JM Dutertre, P Maurine, ... 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 60 | 2014 |
| Frontside laser fault injection on cryptosystems-Application to the AES'last round C Roscian, JM Dutertre, A Tria 2013 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2013 | 53 | 2013 |
| A side-channel and fault-attack resistant AES circuit working on duplicated complemented values M Doulcier-Verdier, JM Dutertre, J Fournier, JB Rigaud, B Robisson, ... 2011 IEEE International Solid-State Circuits Conference, 274-276, 2011 | 46 | 2011 |
| A DFA on AES based on the entropy of error distributions R Lashermes, G Reymond, JM Dutertre, J Fournier, B Robisson, A Tria 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 34-43, 2012 | 44 | 2012 |
| Electromagnetic glitch on the AES round counter A Dehbaoui, AP Mirbaha, N Moro, JM Dutertre, A Tria International Workshop on Constructive Side-Channel Analysis and Secure …, 2013 | 40 | 2013 |
| Evidence of a larger EM-induced fault model S Ordas, L Guillaume-Sage, K Tobich, JM Dutertre, P Maurine International Conference on Smart Card Research and Advanced Applications …, 2014 | 39 | 2014 |
| Investigation of timing constraints violation as a fault injection means L Zussa, JM Dutertre, J Clédiere, B Robisson, A Tria 27th Conference on Design of Circuits and Integrated Systems (DCIS), Avignon …, 2012 | 35 | 2012 |
| Single-bit DFA using multiple-byte laser fault injection M Agoyan, JM Dutertre, AP Mirbaha, D Naccache, AL Ribotta, A Tria 2010 IEEE International Conference on Technologies for Homeland Security …, 2010 | 34 | 2010 |
| Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism L Zussa, JM Dutertre, J Clediere, A Tria 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 110-115, 2013 | 31 | 2013 |
| Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS JM Dutertre, RP Bastos, O Potin, ML Flottes, B Rouzeyre, G Di Natale, ... Microelectronics Reliability 54 (9-10), 2289-2294, 2014 | 24 | 2014 |
| Building the electrical model of the pulsed photoelectric laser stimulation of an NMOS transistor in 90nm technology A Sarafianos, O Gagliano, V Serradeil, M Lisart, JM Dutertre, A Tria 2013 IEEE International Reliability Physics Symposium (IRPS), 5B. 5.1-5B. 5.9, 2013 | 22 | 2013 |
| Fault round modification analysis of the advanced encryption standard JM Dutertre, AP Mirbaha, D Naccache, AL Ribotta, A Tria, T Vaschalde 2012 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2012 | 22 | 2012 |
| Review of fault injection mechanisms and consequences on countermeasures design JM Dutertre, JJA Fournier, AP Mirbaha, D Naccache, JB Rigaud, ... 2011 6th International Conference on Design & Technology of Integrated …, 2011 | 22 | 2011 |
| Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection JM Dutertre, RP Bastos, O Potin, ML Flottes, B Rouzeyre, G Di Natale Microelectronics Reliability 53 (9-11), 1320-1324, 2013 | 21 | 2013 |
| Building the electrical model of the Photoelectric Laser Stimulation of a PMOS transistor in 90 nm technology A Sarafianos, R Llido, JM Dutertre, O Gagliano, V Serradeil, M Lisart, ... Microelectronics Reliability 52 (9-10), 2035-2038, 2012 | 19 | 2012 |
Jean-Baptiste RigaudMines Saint-Etienne, CEA-Tech, Centre CMP, Departement SAS, F - 13541 Gardanne FranceAdresse e-mail validée de mines-stetienne.fr
