Design space exploration and implementation of a high performance and low area coarse grained reconfigurable processor D Suh, K Kwon, S Kim, S Ryu, J Kim 2012 international conference on field-programmable technology, 67-70, 2012 | 52 | 2012 |
Fused multiply-add apparatus and method HS Yu, D Suh, SJ Kim, S Kim, Y Lee US Patent 8,805,915, 2014 | 50 | 2014 |
Reconfigurable processor and reconfigurable processing method of vector operation using vector lane configuration information D Suh, HS Yu, SJ Kim US Patent 9,135,003, 2015 | 46 | 2015 |
Processor including a cache and a scratch pad memory and memory control method thereof IH Park, RYU Soojung, D Yoo, DK Suh, KIM Jeongwook, CK Jang US Patent 9,015,451, 2015 | 39 | 2015 |
Reconfigurable processor having constant storage register D Suh, SJ Kim US Patent App. 14/269,764, 2014 | 18 | 2014 |
Reconfigurable processor and operation method therefor D Suh, K Kwon, YH Park, SW Lee, SJ Kim US Patent 10,396,797, 2019 | 16 | 2019 |
Static branch prediction method and code execution method for pipeline processor, and code compiling method for static branch prediction T Jin, D Suh, SJ Kim US Patent 8,954,946, 2015 | 9 | 2015 |
Method and apparatus for performing vector operations using look up tables JU Cho, SJ Kim, D Suh US Patent 10,409,596, 2019 | 8 | 2019 |
Improving energy efficiency of coarse-grain reconfigurable arrays through modulo schedule compression/decompression H Lee, MS Moghaddam, D Suh, B Egger ACM Transactions on Architecture and Code Optimization (TACO) 15 (1), 1-26, 2018 | 7 | 2018 |
NOP compression scheme for high speed DSPs based on VLIW architecture T Jin, M Ahn, D Yoo, D Suh, Y Choi, DH Kim, S Lee 2014 IEEE International Conference on Consumer Electronics (ICCE), 304-305, 2014 | 6 | 2014 |
Method of power simulation and power simulator DK Suh, RYU Soojung, D Yoo, IH Park US Patent 8,095,806, 2012 | 4 | 2012 |
Electronic apparatus and control method thereof K Kim, YH Park, D Suh, KP Nagaraja, DH Kim, SJ Kim, H Cho, HJ Kim US Patent App. 16/031,565, 2019 | 3 | 2019 |
Vector processor and control method therefor K Kwon, J Park, D Suh, Y Kang-Jin US Patent 11,263,018, 2022 | 2 | 2022 |
VLIW interface device and method for controlling the same YC Cho, SJ Kim, CS Park, D Suh US Patent 10,782,974, 2020 | 2 | 2020 |
Method and apparatus for parallel processing data including bypassing memory address alias checking D Suh, SJ Kim, YH Park US Patent 10,013,176, 2018 | 2 | 2018 |
Method and apparatus for controlling reconfigurable processor D Suh, SJ Kim, CS Park US Patent App. 15/039,603, 2017 | 2 | 2017 |
Reconfigurable processor and mini-core of reconfigurable processor D Suh, SJ Kim, HS Yu, K Kwon, J Park US Patent 9,330,057, 2016 | 2 | 2016 |
Electronic device and control method thereof K Kim, YH Park, D Suh, KP Nagaraja, DH Kim, SJ Kim, H Cho, HJ Kim US Patent 11,568,323, 2023 | 1 | 2023 |
Method and apparatus for executing multi-thread using mask value JS Lee, D Suh, SW Lee US Patent 10,606,594, 2020 | 1 | 2020 |
Method and device for allocating a VLIW instruction based on slot information stored in a database by a calculation allocation instruction D Suh, SJ Kim, D Kim, T Jin US Patent 10,599,439, 2020 | 1 | 2020 |