| Using BDI agents to improve driver modelling in a commuter scenario RJF Rossetti, RH Bordini, ALC Bazzan, S Bampi, R Liu, D Van Vliet Transportation Research Part C: Emerging Technologies 10 (5-6), 373-398, 2002 | 133 | 2002 |
| Pipelined fast 2D DCT architecture for JPEG image compression LV Agostini, IS Silva, S Bampi Symposium on Integrated Circuits and Systems Design, 226-231, 2001 | 128 | 2001 |
| An agent-based framework for the assessment of drivers' decision-making RJF Rossetti, S Bampi, R Liu, D Van Vliet, HBB Cybis ITSC2000. 2000 IEEE Intelligent Transportation Systems. Proceedings (Cat. No …, 2000 | 61 | 2000 |
| Run-time adaptive energy-aware motion and disparity estimation in multiview video coding B Zatt, M Shafique, F Sampaio, L Agostini, S Bampi, J Henkel 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC), 1026-1031, 2011 | 54 | 2011 |
| Motion vectors merging: low complexity prediction unit decision heuristic for the inter-prediction of HEVC encoders F Sampaio, S Bampi, M Grellert, L Agostini, J Mattos 2012 IEEE international conference on multimedia and expo, 657-662, 2012 | 50 | 2012 |
| Analysis and design of amplifiers and comparators in CMOS 0.35 μm technology FP Cortes, E Fabris, S Bampi Microelectronics Reliability 44 (4), 657-664, 2004 | 49 | 2004 |
| Dynamically reconfigurable architecture for image processor applications A Adário, EL Roehe, S Bampi Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 623-628, 1999 | 47 | 1999 |
| Gop structure adaptive to the video content for efficient H. 264/AVC encoding B Zatt, M Porto, J Scharcanski, S Bampi 2010 IEEE International Conference on Image Processing, 3053-3056, 2010 | 36 | 2010 |
| A new architecture for signed radix-2/sup m/pure array multipliers E Costa, S Bampi, J Monteiro Proceedings. IEEE International Conference on Computer Design: VLSI in …, 2002 | 35 | 2002 |
| A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard D Palomino, F Sampaio, L Agostini, S Bampi, A Susin 2012 19th IEEE International Conference on Image Processing, 201-204, 2012 | 34 | 2012 |
| Design of very deep pipelined multipliers for FPGAs A Panato, S Silva, F Wagner, M Johann, R Reis, S Bampi Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 34 | 2004 |
| Approximation-aware multi-level cells STT-RAM cache architecture F Sampaio, M Shafique, B Zatt, S Bampi, J Henkel 2015 International Conference on Compilers, Architecture and Synthesis for …, 2015 | 33 | 2015 |
| Adaptive content-based Tile partitioning algorithm for the HEVC standard C Blumenberg, D Palomino, S Bampi, B Zatt 2013 Picture Coding Symposium (PCS), 185-188, 2013 | 33 | 2013 |
| Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs LV Agostini, IS Silva, S Bampi Microprocessors and Microsystems 31 (8), 487-497, 2007 | 33 | 2007 |
| Picowatt, 0.45–0.6 V Self-Biased Subthreshold CMOS Voltage Reference AC de Oliveira, D Cordova, H Klimach, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 64 (12), 3036-3046, 2017 | 29 | 2017 |
| A reconfigurable hardware architecture for fractional pixel interpolation in high efficiency video coding CM Diniz, M Shafique, S Bampi, J Henkel IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 29 | 2014 |
| Resistorless BJT bias and curvature compensation circuit at 3.4 nW for CMOS bandgap voltage references OE Mattia, H Klimach, S Bampi Electronics Letters 50 (12), 863-864, 2014 | 29 | 2014 |
| High-throughput interpolation hardware architecture with coarse-grained reconfigurable datapaths for HEVC CM Diniz, M Shafique, S Bampi, J Henkel 2013 IEEE International Conference on Image Processing, 2091-2095, 2013 | 29 | 2013 |
| High-throughput interpolation hardware architecture with coarse-grained reconfigurable datapaths for HEVC CM Diniz, M Shafique, S Bampi, J Henkel 20th IEEE International Conference on Image Processing (ICIP), 2013 | 29 | 2013 |
| Design of a digital FM demodulator based on a 2nd-order all-digital phase-locked loop JPM Brito, S Bampi Analog Integrated Circuits and Signal Processing 57 (1-2), 97-105, 2008 | 28 | 2008 |
Jörg HenkelProfessor of Computer Science, Karlsruhe Institute of TechnologyAdresse e-mail validée de kit.edu
