The analysis of one-dimensional linear cellular automata and their aliasing properties M Serra, T Slater, JC Muzio, DM Miller IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1990 | 297 | 1990 |

Fast algorithms to generate necklaces, unlabeled necklaces, and irreducible polynomials over GF (2) K Cattell, F Ruskey, J Sawada, M Serra, CR Miers Journal of Algorithms 37 (2), 267-282, 2000 | 91 | 2000 |

2-by-n hybrid cellular automata with regular configuration: theory and application K Cattell, S Zhang, M Serra, JC Muzio IEEE Transactions on Computers 48 (3), 285-295, 1999 | 63 | 1999 |

Testing M Serra, BI Dervisoglu Computers, Software Engineering, and Digital Devices, 7-1-7-28, 2018 | 36 | 2018 |

Testing, Chapter 79 M Serra, BI Dervisoglu The Electrical Engineering Handbook, Richard C. Dorf, Editor in Chief, 1808, 1837 | 33 | 1837 |

The number of irreducible polynomials over GF (2) with given trace and subtrace K Cattell, CR Miers, F Ruskey, J Sawada, M Serra Journal of Combinatorial Mathematics and Combinatorial Computing 47, 31-64, 2003 | 30 | 2003 |

Algorithm in a finite field and its application M Serra J. Combinatorial Mathematics and Combinatorial Computing, 11-32, 1990 | 30 | 1990 |

Hardware/software co-design of a Java virtual machine KB Kent, M Serra Proceedings 11th International Workshop on Rapid System Prototyping. RSP …, 2000 | 27 | 2000 |

The use of autocorrelation coefficients for variable ordering for ROBDDs JE Rice, M Serra, JC Muzio Proceedings of the 4th International Workshop on Applications of the Reed …, 1999 | 24 | 1999 |

Merging concurrent checking and off-line BIST X Sun | 24 | 1992 |

The generation of rimitive olynomials in GF (q) with independent roots and their applications for ower residue codes, VLSI testing and finite field multipliers using normal basis TA Gulliver, M Serra, VK Bhargava International journal of electronics 71 (4), 559-576, 1991 | 22 | 1991 |

Using FPGAs to solve the hamiltonian cycle problem M Serra, K Kent Proceedings of the 2003 International Symposium on Circuits and Systems …, 2003 | 21 | 2003 |

Testing programmable logic arrays by sum of syndromes M Serra, JC Muzio IEEE transactions on computers 100 (9), 1097-1101, 1987 | 20 | 1987 |

Aliasing probabilities for some data compression techniques JC Muzio, F Ruskey, RC Aitken, M Serra Developments in IC Testing, 1987 | 17 | 1987 |

Hardware architecture for Java in a hardware/software co-design of the virtual machine KB Kent, M Serra Proceedings Euromicro Symposium on Digital System Design. Architectures …, 2002 | 16 | 2002 |

Context switching in a hardware/software co-design of the Java virtual machine KB Kent, M Serra Designer’s Forum of Design Automation & Test in Europe (DATE), 81-86, 2002 | 16 | 2002 |

Applications of multi-valued logic to testing of binary and MVL circuits M Serra International journal of electronics 63 (2), 197-214, 1987 | 16 | 1987 |

A multimedia virtual lab for digital logic design M Serra, E Wang, JC Muzio Proceedings 1999 IEEE International Conference on Microelectronic Systems …, 1999 | 15 | 1999 |

Quasi-synchronous microcontroller-based highly accurate digital sampling of AC signals WGK Ihlenfeld, E Mohns, M Serra, K Dauke, A Suchy IEEE Transactions on Instrumentation and Measurement 56 (2), 414-417, 2007 | 12 | 2007 |

Hardware/software co-design for virtual machines KB Kent, M Serra, N Horspool IEE Proceedings-Computers and Digital Techniques 152 (5), 537-548, 2005 | 12 | 2005 |