Suivre
Mario D. Marino
Mario D. Marino
Senior Lecturer at Leeds Beckett University (UK)
Adresse e-mail validée de leedsbeckett.ac.uk - Page d'accueil
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Année
An evaluation of the TRIPS computer system
M Gebhart, BA Maher, KE Coons, J Diamond, P Gratz, M Marino, ...
ACM SIGARCH Computer Architecture News 37 (1), 1-12, 2009
922009
A regularized cross-layer ladder network for intrusion detection in industrial internet of things
J Long, W Liang, KC Li, Y Wei, MD Marino
IEEE Transactions on Industrial Informatics 19 (2), 1747-1755, 2022
412022
32-core CMP with multi-sliced L2: 2 and 4 cores sharing a L2 slice
MD Marino, PSOUO Sã, O Paulo
2006 18th International Symposium on Computer Architecture and High …, 2006
172006
Insights on Memory Controller Scaling in Multicore Embedded-Systems
MD Marino, KC Li
International Journal of Embedded Systems (IJES) 6 (4), 2014
142014
An evolutionary-based approach for low-complexity intrusion detection in wireless sensor networks
T Zhang, D Han, MD Marino, L Wang, KC Li
Wireless Personal Communications, 1-24, 2022
122022
L2-cache hierarchical organizations for multi-core architectures
MD Marino
International Symposium on Parallel and Distributed Processing and …, 2006
122006
RFiof: An RF Approach to I/O-pin and Memory Controller Scalability for Off-chip Memories
MD Marino
International Conference on Computing Frontiers, 2013
102013
RFiop: RF-memory path to address on-package I/O pad and memory controller scalability
MD Marino
2012 IEEE 30th International Conference on Computer Design (ICCD), 183-188, 2012
102012
RAMON: region-aware memory controller
MD Marino, KC Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (4), 697-710, 2018
92018
An efficient algorithm for modelling and dynamic prediction of network traffic
W Fan, H Zhang, KC Li, S Zhang, MD Marino, H Jiang
International Journal of Computational Science and Engineering 16 (3), 311-320, 2018
92018
GPU computations on Hadoop clusters for massive data processing
W Chen, S Xu, H Jiang, TH Weng, MD Marino, YS Chen, KC Li
Proceedings of the 3rd International Conference on Intelligent Technologies …, 2016
92016
On-Package Scalability of RF and Inductive Memory Controllers
MD Marino
Euromicro DSD, 923-930, 2012
92012
On parallelisation of image dehazing with OpenMP
TH Weng, YS Chen, H Lu, MD Marino, KC Li
International Journal of Embedded Systems 11 (4), 427-439, 2019
82019
Last level cache size heterogeneity in embedded systems
MD Marino, KC Li
The Journal of Supercomputing 72, 503-544, 2016
62016
A Preliminary DSM Speedup Comparison: JIAJIA x Nautilus
MD Marino, GL Campos
High Performance Computing Systems and Applications, 413-428, 2000
62000
Evaluation of the traffic on the nautilus dsm system using updates: Ratio among the number of messages and the mean size of the consistency messages
MD Marino, GL Campos
XXIV Latin American Conference of Informatica (CLEI’98), Memories 1, 325-333, 1998
61998
System Implications of LLC MSHRs in Scalable Memory Systems
MD Marino, KC Li
Microprocessors and Microsystems, 2017
52017
Implications of Shallower Memory Controller Transaction Queues in Scalable Memory Systems
MD Marino, L K.C.
Journal of Supercomputing, 2015
42015
An evaluation of the TRIPS computer system (extended technical report)
M Gebhart, BA Maher, KE Coons, J Diamond, P Gratz, M Marino, ...
42008
An evaluation of the speedup of Nautilus DSM system
MD Marino, GL Campos, LM Sato
IASTED PDCS99, 1999
41999
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