| FPGA side channel attacks without physical access C Ramesh, SB Patil, SN Dhanuskodi, G Provelengios, S Pillement, ... 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018 | 169 | 2018 |
| DART: a dynamically reconfigurable architecture dealing with future mobile telecommunications constraints R David, D Chillet, S Pillement, O Sentieys IEEE International Parallel and Distributed Processing Symposium, 2003 | 85 | 2003 |
| Low Overhead Fault-Tolerance Technique for Dynamically Reconfigurable Softcore Processor H Pham, S Pillement, S Piestrak IEEE Transactions on Computers 99, 1-1, 2012 | 78 | 2012 |
| DART: a Functional-Level Reconfigurable Architecture for High Energy Efficiency S Pillement, O Sentieys, R David EURASIP Journal on Embedded Systems, 5, 2008 | 44 | 2008 |
| UPaRC—Ultra-Fast Power-aware Reconfiguration Controller R Bonamy, HM Pham, S Pillement, D Chillet Design and Test in Europe, 2012 | 41 | 2012 |
| Design of a Fault-Tolerant Coarse-Grained Reconfigurable Architecture: A Case Study S Jafri, SJ Piestrak, O Sentieys, S Pillement Quality Electronic Design (ISQED), 2010 11th International Symposium on, 845-852, 2010 | 41* | 2010 |
| Towards Future Adaptive Multiprocessor Systems-On-Chip: an Innovative Approach for Flexible Architectures F Lemonnier, P Millet, GM Almeida, M Hübner, J Becker, S Pillement, ... Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS), 2012 | 36 | 2012 |
| Flexible interconnection network for dynamically and partially reconfigurable architectures L Devaux, S Ben Sassi, S Pillement, D Chillet, D Demigny International Journal of Reconfigurable Computing 2010 (1), 390545, 2010 | 35 | 2010 |
| Dart: A dynamically reconfigurable architecture dealing with next generation telecommunications constraints R David, D Chillet, S Pillement, O Sentieys 9th IEEE Reconfigurable Architecture Workshop RAW, 2002 | 29 | 2002 |
| Error recovery technique for coarse-grained reconfigurable architectures MM Azeem, SJ Piestrak, O Sentieys, S Pillement 14th IEEE International Symposium on Design and Diagnostics of Electronic …, 2011 | 28 | 2011 |
| A low-power and high-speed quaternary interconnection link using efficient converters JM Philippe, S Pillement, O Sentieys 2005 IEEE International Symposium on Circuits and Systems, 4689-4692, 2005 | 27 | 2005 |
| Area efficient temporal coding schemes for reducing crosstalk effects JM Philippe, S Pillement, O Sentieys 7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-339, 2006 | 25 | 2006 |
| Method and device for programming a FPGA O Sentieys, S Pillement, C Huriaux, A Courtay US Patent 9,754,061, 2017 | 23 | 2017 |
| Energy-efficient GPS synchronization for wireless nodes D Pallier, V Le Cam, S Pillement IEEE Sensors Journal 21 (4), 5221-5229, 2020 | 22 | 2020 |
| Gradient—An adaptive fault-tolerant routing algorithm for 2D mesh network-on-chips I Pratomo, S Pillement Proceedings of the 2012 Conference on Design and Architectures for Signal …, 2012 | 21 | 2012 |
| Real-Time Scheduling on Heterogeneous System-on-Chip Architectures Using an Optimized Artificial Neural Network D Chillet, A Eiche, S Pillement, O Sentieys Journal of Systems Architecture 57 (4), 340--353, 2011 | 21 | 2011 |
| Designing efficient codecs for bus-invert berger code for fully asymmetric communication SJ Piestrak, S Pillement, O Sentieys iEEE transactions on circuits and systems ii: Express Briefs 57 (10), 777-781, 2010 | 21 | 2010 |
| OveRSoC: a framework for the exploration of RTOS for RSoC platforms B Miramond, E Huck, F Verdier, A Benkhelifa, B Granado, T Lefebvre, ... International Journal of Reconfigurable Computing 2009 (1), 450607, 2009 | 20 | 2009 |
| Hardware runtime verification of embedded software in SoPC D Solet, JL Béchennec, M Briday, S Faucou, S Pillement 2016 11th IEEE Symposium on Industrial Embedded Systems (SIES), 1-6, 2016 | 19 | 2016 |
| A compilation framework for a dynamically reconfigurable architecture R David, D Chillet, S Pillement, O Sentieys Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002 | 18 | 2002 |
Olivier SentieysProfessor, University of Rennes, IRISA, INRIA, FranceVerified email at irisa.fr
