Barrier layer for FinFET channels RK Oxland, M Van Dal, MC Holland, G Vellianitis, M Passlack
US Patent 9,214,555, 2015
556 2015 Strained channel field effect transistor M Van Dal, G Doornbos, G Vellianitis, TL Lee, F Yuan
US Patent 9,761,666, 2017
215 2017 HfO2 high-κ gate dielectrics on Ge (100) by atomic oxygen beam deposition A Dimoulas, G Mavrou, G Vellianitis, E Evangelou, N Boukos, M Houssa, ...
Applied Physics Letters 86 (3), 2005
185 2005 Structural and electrical quality of the high-k dielectric A Dimoulas, G Vellianitis, A Travlos, V Ioannou-Sougleridis, ...
Journal of Applied Physics 92 (1), 426-431, 2002
136 2002 Highly manufacturable FinFETs with sub-10nm fin width and high aspect ratio fabricated with immersion lithography MJH Van Dal, N Collaert, G Doornbos, G Vellianitis, G Curatola, ...
2007 IEEE symposium on VLSI technology, 110-111, 2007
111 2007 Demonstration of scaled Ge p-channel FinFETs integrated on Si MJH Van Dal, G Vellianitis, G Doornbos, B Duriez, TM Shen, CC Wu, ...
2012 International Electron Devices Meeting, 23.5. 1-23.5. 4, 2012
85 2012 Complex admittance analysis for G Apostolopoulos, G Vellianitis, A Dimoulas, JC Hooker, T Conard
Applied physics letters 84 (2), 260-262, 2004
83 2004 Intrinsic carrier effects in HfO2–Ge metal–insulator–semiconductor capacitors A Dimoulas, G Vellianitis, G Mavrou, EK Evangelou, A Sotiropoulos
Applied Physics Letters 86 (22), 2005
81 2005 Direct heteroepitaxy of crystalline k gate dielectric applications A Dimoulas, A Travlos, G Vellianitis, N Boukos, K Argyropoulos
Journal of Applied Physics 90 (8), 4224-4230, 2001
79 2001 Germanium p-channel FinFET fabricated by aspect ratio trapping MJH Van Dal, G Vellianitis, B Duriez, G Doornbos, CH Hsieh, BH Lee, ...
IEEE Transactions on Electron Devices 61 (2), 430-436, 2014
78 2014 Ru and RuO2 gate electrodes for advanced CMOS technology K Fröhlich, K Husekova, D Machajdik, JC Hooker, N Perez, M Fanciulli, ...
Materials Science and Engineering: B 109 (1-3), 117-121, 2004
74 2004 La2Hf2O7 high-κ gate dielectric grown directly on Si (001) by molecular-beam epitaxy A Dimoulas, G Vellianitis, G Mavrou, G Apostolopoulos, A Travlos, ...
Applied physics letters 85 (15), 3205-3207, 2004
69 2004 An ultralow-resistance ultrashallow metallic source/drain contact scheme for III–V NMOS R Oxland, SW Chang, X Li, SW Wang, G Radhakrishnan, W Priyantha, ...
IEEE electron device letters 33 (4), 501-503, 2012
60 2012 Scaled p-channel Ge FinFET with optimized gate stack and record performance integrated on 300mm Si wafers B Duriez, G Vellianitis, MJH Van Dal, G Doornbos, R Oxland, ...
2013 IEEE International Electron Devices Meeting, 20.1. 1-20.1. 4, 2013
58 2013 Effects on surface morphology of epitaxial Y2O3 layers on Si (001) after postgrowth annealing V Ioannou-Sougleridis, V Constantoudis, M Alexe, R Scholz, G Vellianitis, ...
Thin Solid Films 468 (1-2), 303-309, 2004
57 2004 High epitaxial quality G Apostolopoulos, G Vellianitis, A Dimoulas, M Alexe, R Scholz, ...
Applied Physics Letters 81 (19), 3549-3551, 2002
52 2002 Electrical properties of V Ioannou-Sougleridis, G Vellianitis, A Dimoulas
Journal of applied physics 93 (7), 3982-3989, 2003
51 2003 InAs N-MOSFETs with record performance of Ion = 600 μA/μm at Ioff = 100 nA/μm (Vd = 0.5 V) SW Chang, X Li, R Oxland, SW Wang, CH Wang, R Contreras-Guerrero, ...
2013 IEEE International Electron Devices Meeting, 16.1. 1-16.1. 4, 2013
47 2013 MBE lanthanum-based high-k gate dielectrics as candidates for SiO2 gate oxide replacement G Vellianitis, G Apostolopoulos, G Mavrou, K Argyropoulos, A Dimoulas, ...
Materials Science and Engineering: B 109 (1-3), 85-88, 2004
46 2004 Ge CMOS gate stack and contact development for vertically stacked lateral nanowire FETs MJH Van Dal, G Vellianitis, G Doornbos, B Duriez, MC Holland, T Vasen, ...
2018 IEEE International Electron Devices Meeting (IEDM), 21.1. 1-21.1. 4, 2018
43 2018 
Mark van DalTechnical Manager TSMCAdresse e-mail validée de imec.be
