Minsu Kim
Minsu Kim
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Cited by
Cited by
A 68 parallel row access neuromorphic core with 22K multi-level synapses based on logic-compatible embedded flash memory technology
M Kim, J Kim, G Park, L Everson, H Kim, S Song, S Lee, CH Kim
2018 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4, 2018
Non-volatile memory device for reducing operating time and method of operating the same
MS Kim
US Patent 8,923,056, 2014
A 1-Tb, 4b/cell, 176-stacked-WL 3D-NAND flash memory with improved read latency and a 14.8 Gb/mm2 density
W Cho, J Jung, J Kim, J Ham, S Lee, Y Noh, D Kim, W Lee, K Cho, K Kim, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 134-135, 2022
An embedded NAND flash-based compute-in-memory array demonstrated in a standard logic process
M Kim, M Liu, LR Everson, CH Kim
IEEE Journal of Solid-State Circuits 57 (2), 625-638, 2021
A high performance co-design of 26 nm 64 Gb MLC NAND flash memory using the dedicated NAND flash controller
BS You, JS Park, SD Lee, GH Baek, JH Lee, MS Kim, JW Kim, H Chung, ...
JSTS: Journal of Semiconductor Technology and Science 11 (2), 121-129, 2011
A 3D NAND flash ready 8-bit convolutional neural network core demonstrated in a standard logic process
M Kim, M Liu, L Everson, G Park, Y Jeon, S Kim, S Lee, S Song, CH Kim
2019 IEEE International Electron Devices Meeting (IEDM), 38.3. 1-38.3. 4, 2019
A 32Gb MLC NAND flash memory with Vth margin-expanding schemes in 26nm CMOS
T Kim, SD Lee, J Park, H Cho, B You, K Baek, J Lee, C Yang, M Yun, ...
2011 IEEE International Solid-State Circuits Conference, 202-204, 2011
Reliability characterization of logic-compatible NAND flash memory based synapses with 3-bit per cell weights and 1μa current steps
M Kim, J Song, CH Kim
2020 IEEE International Reliability Physics Symposium (IRPS), 1-4, 2020
Semiconductor memory apparatus with main memory blocks and redundant memory blocks sharing a common global data line
MS Kim
US Patent 9,224,445, 2015
An all BTI (N-PBTI, N-NBTI, P-PBTI, P-NBTI) odometer based on a dual power rail ring oscillator array
G Park, H Yu, M Kim, CH Kim
2021 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2021
A 64Gb NAND Flash Memory with 800MB/s Synchronous DDR Interface
H Huh, CW Jeon, CW Yang, JS Park, TH Kwon, TK Kang, CW Yang, ...
2012 4th IEEE International Memory Workshop, 1-4, 2012
A counter based ADC non-linearity measurement circuit and its application to reliability testing
G Park, M Kim, N Pande, PW Chiu, J Song, CH Kim
2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019
Mapim: Mat parallelism for high performance processing in non-volatile memory architecture
J Sim, M Kim, Y Kim, S Gupta, B Khaleghi, T Rosing
20th International Symposium on Quality Electronic Design (ISQED), 145-150, 2019
All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
G Park, M Kim, CH Kim, B Kim, V Reddy
2018 IEEE International Reliability Physics Symposium (IRPS), 5C. 2-1-5C. 2-6, 2018
Semiconductor devices and semiconductor systems including the same
MS Kim
US Patent 9,305,621, 2016
Semiconductor memory device and method of operating the same
MS Kim
US Patent 8,634,261, 2014
Active control circuit, internal voltage generation circuit, memory apparatus and system using the same
MS Kim
US Patent App. 15/279,838, 2017
Voltage generator, semiconductor memory device having the same, and method of operating semiconductor memory device
MS Kim
US Patent 9,607,709, 2017
Semiconductor memory device
KM Chae, MS Kim
US Patent 9,607,706, 2017
Data transmission circuit, memory including the same, and data transmission method
MS Kim
US Patent 9,147,482, 2015
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