| Dynamic voltage and frequency scheduling for embedded processors considering power/performance tradeoffs ME Salehi, M Samadi, M Najibi, A Afzali-Kusha, M Pedram, SM Fakhraie IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (10 …, 2010 | 55 | 2010 |
| Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs M Najibi, K Saleh, M Naderi, H Pedram, M Sedighi 16th IEEE International Workshop on Rapid System Prototyping (RSP'05), 63-69, 2005 | 39 | 2005 |
| Globally asynchronous locally synchronous wrapper circuit based on clock gating E Amini, M Najibi, H Pedram IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and …, 2006 | 35 | 2006 |
| Slack matching mode-based asynchronous circuits for average-case performance M Najibi, PA Beerel 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 219-225, 2013 | 24 | 2013 |
| Dynamic voltage and frequency management based on variable update intervals for frequency setting M Najibi, M Salehi, AA Kusha, M Pedram, SM Fakhraie, H Pedram Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 23 | 2006 |
| Performance bounds of asynchronous circuits with mode-based conditional behavior M Najibi, PA Beerel 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems …, 2012 | 19 | 2012 |
| An EDA tool for implementation of low power and secure crypto-chips B Ghavami, H Pedram, M Najibi Computers & Electrical Engineering 35 (2), 244-257, 2009 | 18 | 2009 |
| FPGA implementation of gated clock based globally asynchronous locally synchronous wrapper circuits E Amini, M Najibi, Z Jeddi, H Pedram 2007 International Symposium on Signals, Circuits and Systems 1, 1-4, 2007 | 12 | 2007 |
| Using standard ASIC back-end for QDI asynchronous circuits: dealing with isochronic fork constraint M Najibi, K Saleh, H Pedram Proceedings of the 17th ACM Great Lakes symposium on VLSI, 299-304, 2007 | 10 | 2007 |
| Deriving performance bounds for conditional asynchronous circuits using linear programing M Najibi, PA Beerel 2013 IEEE 19th International Symposium on Asynchronous Circuits and Systems …, 2013 | 8 | 2013 |
| A novel clock generation scheme for globally asynchronous locally synchronous systems: An FPGA-validated approach K Saleh, M Najibi, M Naderi, H Pedram, M Sedighi Proceedings of the 15th ACM Great Lakes symposium on VLSI, 296-301, 2005 | 7 | 2005 |
| An asynchronous fpga logic cell implementation A Mahram, M Najibi, H Pedram Proceedings of the 17th ACM Great Lakes symposium on VLSI, 176-179, 2007 | 6 | 2007 |
| Integrated fanout optimization and slack matching of asynchronous circuits M Najibi, PA Beerel 2014 20th IEEE International Symposium on Asynchronous Circuits and Systems …, 2014 | 4 | 2014 |
| Performance Evaluation of Asynchronous Circuits Using Abstract Probabilistic Timed Petri Nets with Choice M Najibi, M Niknahad, H Pedram ISVLSI, 2007 | 4 | 2007 |
| Pre-synthesis optimization for asynchronous circuits using compiler techniques S ZamanZadeh, M Najibi, H Pedram Advances in Computer Science and Engineering: 13th International CSI …, 2009 | 3 | 2009 |
| A power estimation methodology for QDI asynchronous circuits based on high-level simulation M Niknahad, B Ghavami, M Najibi, H Pedram IEEE computer society annual symposium on VLSI (ISVLSI'07), 471-472, 2007 | 3 | 2007 |
| Performance evaluation of asynchronous circuits with choice using abstract probabilistic timed Petri nets M Najibi, M Niknahad, H Pedram IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 422-427, 2007 | 3 | 2007 |
| A fast and accurate power estimation methodology for QDI asynchronous circuits B Ghavami, M Niknahad, M Najibi, H Pedram International Workshop on Power and Timing Modeling, Optimization and …, 2007 | 2 | 2007 |
| Exploring the Design of A RISC Asynchronous Processor Using Persia Asynchronous Toolset M Mirzaaghatabar, M Najibi, K Saleh, H Pedram Proceedings of the 14th Iranian Conference on Electrical Engineering (ICEE2006), 2006 | 2 | 2006 |
| New methods to reduce energy and area in asynchronous circuits following the decomposition stage MH Shafiaabadi, M Najibi, H Pedram, M Naderi, K Saleh Proceedings of the 10th annual computer society of Iran computer conference …, 2005 | 2 | 2005 |
Peter BeerelProfessor of Electrical and Computer Engineering, USCAdresse e-mail validée de usc.edu
