Hermes: an efficient federated learning framework for heterogeneous mobile clients A Li, J Sun, P Li, Y Pu, H Li, Y Chen Proceedings of the 27th Annual International Conference on Mobile Computing …, 2021 | 148 | 2021 |
An ultra-low-energy multi-standard JPEG co-processor in 65 nm CMOS with sub/near threshold supply voltage Y Pu, JP de Gyvez, H Corporaal, Y Ha IEEE Journal of Solid-State Circuits 45 (3), 668-680, 2010 | 116 | 2010 |
Xuantie-910: A commercial multi-core 12-stage pipeline out-of-order 64-bit high performance RISC-V processor with vector extension: Industrial product C Chen, X Xiang, C Liu, Y Shang, R Guo, D Liu, Y Lu, Z Hao, J Luo, ... 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 95 | 2020 |
An ultra-low-energy/frame multi-standard JPEG co-processor in 65nm CMOS with sub/near-threshold power supply Y Pu, JP de Gyvez, H Corporaal, Y Ha 2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009 | 74 | 2009 |
A 9-mm2 Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things Y Pu, C Shi, G Samson, D Park, K Easton, R Beraha, A Newham, M Lin, ... IEEE Journal of Solid-State Circuits 53 (3), 936-948, 2018 | 66 | 2018 |
Robust QRS detection using high-resolution wavelet packet decomposition and time-attention convolutional neural network M Jia, F Li, J Wu, Z Chen, Y Pu IEEE Access 8, 16979-16988, 2020 | 50 | 2020 |
A robust QRS detection and accurate R-peak identification algorithm for wearable ECG sensors K Zhao, Y Li, G Wang, Y Pu, Y Lian Science China Information Sciences 64 (8), 182401, 2021 | 48 | 2021 |
Misleading energy and performance claims in sub/near threshold digital systems Y Pu, X Zhang, J Huang, A Muramatsu, M Nomura, K Hirairi, H Takata, ... 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 625-631, 2010 | 48 | 2010 |
Xetal-Pro: An ultra-low energy and high throughput SIMD processor Y He, Y Pu, R Kleihorst, Z Ye, AA Abbo, SM Londono, H Corporaal Proceedings of the 47th Design Automation Conference, 543-548, 2010 | 46 | 2010 |
Curved in-plane electromechanical relay for low power logic applications D Grogg, U Drechsler, A Knoll, U Duerig, Y Pu, C Hagleitner, M Despont Journal of Micromechanics and Microengineering 23 (2), 025024, 2013 | 42 | 2013 |
An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model Y Pu, Y Ha Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 30 | 2006 |
Automated heartbeat classification exploiting convolutional neural network with channel-wise attention F Li, J Wu, M Jia, Z Chen, Y Pu IEEE Access 7, 122955-122963, 2019 | 29 | 2019 |
From Xetal-II to Xetal-Pro: On the road toward an ultralow-energy and high-throughput SIMD processor Y Pu, Y He, Z Ye, SM Londono, AA Abbo, R Kleihorst, H Corporaal IEEE Transactions on Circuits and Systems for Video Technology 21 (4), 472-484, 2011 | 25 | 2011 |
Vt balancing and device sizing towards high yield of sub-threshold static logic gates Y Pu, JP de Gyvez, H Corporaal, Y Ha Proceedings of the 2007 international symposium on Low power electronics and …, 2007 | 25 | 2007 |
Digital systems power management for high performance mixed signal platforms A Kapoor, C Groot, GV Piqué, H Fatemi, J Echeverri, L Sevat, M Vertregt, ... IEEE Transactions on Circuits and Systems I: Regular Papers 61 (4), 961-975, 2014 | 24 | 2014 |
Analytical compact model in Verilog-A for electrostatically actuated ohmic switches A Bazigos, CL Ayala, M Fernandez-Bolanos, Y Pu, D Grogg, C Hagleitner, ... IEEE Transactions on Electron Devices 61 (6), 2186-2194, 2014 | 21 | 2014 |
Catena: A near-threshold, sub-0.4-mW, 16-core programmable spatial array accelerator for the ultralow-power mobile and embedded Internet of Things JP Cerqueira, TJ Repetti, Y Pu, S Priyadarshi, MA Kim, M Seok IEEE Journal of Solid-State Circuits 55 (8), 2270-2284, 2020 | 19 | 2020 |
A neural network-based ECG classification processor with exploitation of heartbeat similarity J Wu, F Li, Z Chen, Y Pu, M Zhan IEEE Access 7, 172774-172782, 2019 | 19 | 2019 |
A 1-V input, 0.2-V to 0.47-V output switched-capacitor DC-DC converter with pulse density and width modulation (PDWM) for 57% ripple reduction X Zhang, Y Pu, K Ishida, Y Ryu, Y Okuma, PH Chen, K Watanabe, ... 2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010 | 17 | 2010 |
0.5–1-V, 90–400-mA, modular, distributed, 3× 3 digital LDOs based on event-driven control and domino sampling and regulation SJ Kim, D Kim, Y Pu, C Shi, SB Chang, M Seok IEEE Journal of Solid-State Circuits 56 (9), 2781-2794, 2021 | 15 | 2021 |