| Dead block predictors for cooperative execution in the last level cache R Natarajan, J Guar, N Bashyam, M Chaudhuri, S Subramoney US Patent 9,195,606, 2015 | 21 | 2015 |
| Characterizing multi-threaded applications for designing sharing-aware last-level cache replacement policies R Natarajan, M Chaudhuri 2013 IEEE international symposium on workload characterization (IISWC), 1-10, 2013 | 19 | 2013 |
| Performance characterization of data mining benchmarks V Mekkat, R Natarajan, WC Hsu, A Zhai Proceedings of the 2010 Workshop on Interaction between Compilers and …, 2010 | 13 | 2010 |
| Branch predictor with empirical branch bias override NK Soundararajan, S Subramoney, R Pal, R Natarajan US Patent 10,423,422, 2019 | 9 | 2019 |
| Opportunistic early pipeline re-steering for data-dependent branches S Gupta, N Soundararajan, R Natarajan, S Subramoney Proceedings of the ACM International Conference on Parallel Architectures …, 2020 | 8 | 2020 |
| Towards the adoption of local branch predictors in modern out-of-order superscalar processors N Soundararajan, S Gupta, R Natarajan, J Stark, R Pal, F Sala, ... Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 6 | 2019 |
| Method and apparatus for branch prediction utilizing primary and secondary branch predictors R Pal, R Natarajan, NK Soundararajan, S Subramoney, D Deng, ... US Patent App. 15/614,757, 2018 | 6 | 2018 |
| Leveraging transactional execution for memory consistency model emulation R Natarajan, A Zhai ACM Transactions on Architecture and Code Optimization (TACO) 12 (3), 1-24, 2015 | 6 | 2015 |
| Dynamic detection and prediction for store-dependent branches S Gupta, R Pal, N Soundararajan, R Natarajan, S Subramoney US Patent 10,430,198, 2019 | 4 | 2019 |
| Effectiveness of compiler-directed prefetching on data mining benchmarks R Natarajan, V Mekkat, WC Hsu, A Zhai Journal of Circuits, Systems, and Computers 21 (02), 1240006, 2012 | 3 | 2012 |
| Instruction set architecture based and automatic load tracking for opportunistic re-steer of data-dependent flaky branches S Gupta, N Soundararajan, R Natarajan, S Subramoney US Patent 11,321,089, 2022 | 1 | 2022 |
| Instruction Set Architecture and Microarchitecture for Early Pipeline Re-steering Using Load Address Prediction to Mitigate Branch Misprediction Penalties S Gupta, NK Soundarajan, S Subramoney, R Natarajan US Patent App. 17/028,387, 2022 | 1 | 2022 |
| System, apparatus and method for context-based override of history-based branch predictions S Gupta, N Soundararajan, R Natarajan, JW Stark IV, L Rappoport, ... US Patent 10,949,208, 2021 | 1 | 2021 |
| System, apparatus and method for controlling allocations into a branch prediction circuit of a processor R Natarajan, N Soundararajan, S Subramoney US Patent 10,642,621, 2020 | 1 | 2020 |
| Prediction of next taken branches in a processor S Gupta, R Natarajan, NK Soundararajan, JW Stark IV, S Subramoney US Patent App. 17/448,795, 2023 | | 2023 |
| Apparatuses and methods for dynamic asymmetric scaling of branch predictor tables R Natarajan, N Soundararajan, S Gupta, S Subramoney US Patent 10,664,281, 2020 | | 2020 |
| Misprediction-triggered local history-based branch prediction NK Soundararajan, S Gupta, S Subramoney, R Pal, R Natarajan, D Deng, ... US Patent 10,579,414, 2020 | | 2020 |
| Leveraging Hardware Support For Transactional Execution To Address Correctness And Performance Challenges In Software R Natarajan University of Minnesota, 2015 | | 2015 |
Sreenivas SubramoneyIntel CorporationAdresse e-mail validée de intel.com
