Niket K. Choudhary
Niket K. Choudhary
Qualcomm Technologies
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FabScalar: Composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
NK Choudhary, SV Wadhavkar, TA Shah, H Mayukh, J Gandhi, BH Dwiel, ...
ACM SIGARCH Computer Architecture News 39 (3), 11-22, 2011
Fabscalar: Automating superscalar core design
N Choudhary, S Wadhavkar, T Shah, H Mayukh, J Gandhi, B Dwiel, ...
IEEE Micro 32 (3), 48-59, 2012
A unified view of non-monotonic core selection and application steering in heterogeneous chip multiprocessors
S Navada, NK Choudhary, SV Wadhavkar, E Rotenberg
Proceedings of the 22nd international conference on Parallel architectures …, 2013
Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era
G Patsilaras, NK Choudhary, J Tuck
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-21, 2012
Core-selectability in chip multiprocessors
HH Najaf-Abadi, NK Choudhary, E Rotenberg
2009 18th International Conference on Parallel Architectures and Compilation …, 2009
FPGA modeling of diverse superscalar processors
BH Dwiel, NK Choudhary, E Rotenberg
2012 IEEE International Symposium on Performance Analysis of Systems …, 2012
N Choudhary, S Wadhavkar, T Shah, S Navada, H Najaf-Abadi, ...
WARP, 2009
Criticality-driven superscalar design space exploration
S Navada, NK Choudhary, E Rotenberg
Proceedings of the 19th international conference on Parallel architectures …, 2010
A physical design study of fabscalar-generated superscalar cores
NK Choudhary, BH Dwiel, E Rotenberg
2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012
FabScalar: Automating the design of superscalar processors
NK Choudhary
North Carolina State University, 2012
Hetero23D integration: A scheme for optimizing efficiency/cost of Chip Multiprocessors
S Priyadarshi, NK Choudhary, B Dwiel, A Upreti, E Rotenberg, R Davis, ...
International Symposium on Quality Electronic Design (ISQED), 1-7, 2013
An exploration of OpenCL for a numerical relativity application
NK Choudhary, R Ginjupalli, S Navada, G Khanna
arXiv preprint arXiv:1010.3816, 2010
A Synthesizable HDL Model for Out-of-Order Superscalar Processors.
NK Choudhary
Hierarchical register file system
A Krishna, RW Smith, SS Navada, S Priyadarshi, NK Choudhary, ...
US Patent App. 14/843,921, 2017
Design Trade-offs for Memory Level Parallelism on an Asymmetric Multicore System
G Patsilaras, NK Choudhary, J Tuck
Pespma 2010-Workshop on Parallel Execution of Sequential Programs on Multi …, 2010
Hardware optimization of hard-to-predict short forward branches
VK Reddy, NK Choudhary, MW Morrow
US Patent App. 13/832,119, 2014
Method, apparatus, and system for memory bandwidth aware data prefetching
N Choudhary, DS Ray, TP Speier, E Robinson, HW Cain III, NN Sharma, ...
US Patent App. 16/113,185, 2020
Physical register scrubbing in a computer microprocessor
A Krishna, W Wu, SS Navada, NK Choudhary, RW Smith
US Patent App. 14/221,430, 2015
Design-effort alloy: Boosting a highly tuned primary core with untuned alternate cores
E Forbes, NK Choudhary, BH Dwiel, E Rotenberg
2014 IEEE 32nd International Conference on Computer Design (ICCD), 408-415, 2014
Method, apparatus, and system for prefetching exclusive cache coherence state for store instructions
L Yen, N Choudhary, P Ghoshal, TP Speier, BM Stempel, WJ Mcavoy, ...
US Patent 10,877,895, 2020
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