| Toward increasing FPGA lifetime S Srinivasan, R Krishnan, P Mangalagiri, Y Xie, V Narayanan, MJ Irwin, ... IEEE Transactions on Dependable and Secure Computing 5 (2), 115-127, 2008 | 113 | 2008 |
| A low-power phase change memory based hybrid cache architecture P Mangalagiri, K Sarpatwari, A Yanamandra, VK Narayanan, Y Xie, ... Proceedings of the 18th ACM Great Lakes symposium on VLSI, 395-398, 2008 | 87 | 2008 |
| FLAW: FPGA lifetime awareness S Srinivasan, P Mangalagiri, Y Xie, N Vijaykrishnan, K Sarpatwari Proceedings of the 43rd annual Design Automation Conference, 630-635, 2006 | 73 | 2006 |
| Thermal-aware reliability analysis for platform FPGAs P Mangalagiri, S Bae, R Krishnan, Y Xie, V Narayanan 2008 IEEE/ACM International Conference on Computer-Aided Design, 722-727, 2008 | 45 | 2008 |
| An automated framework for accelerating numerical algorithms on reconfigurable platforms using algorithmic/architectural optimization JS Kim, L Deng, P Mangalagiri, K Irick, K Sobti, M Kandemir, V Narayanan, ... IEEE Transactions on Computers 58 (12), 1654-1667, 2009 | 30 | 2009 |
| Efficient function evaluations with lookup tables for structured matrix operations K Sobti, L Deng, C Chakrabarti, N Pitsianis, X Sun, J Kim, P Mangalagiri, ... 2007 IEEE Workshop on Signal Processing Systems, 463-468, 2007 | 18 | 2007 |
| TANOR: A tool for accelerating N-body simulations on reconfigurable platform JS Kim, P Mangalagiri, K Irick, M Kandemir, V Narayanan, K Sobti, L Deng, ... 2007 International Conference on Field Programmable Logic and Applications …, 2007 | 15 | 2007 |
| Lifetime reliability aware design flow techniques for dual-vdd based platform FPGAs P Mangalagiri, V Narayanan 2009 IEEE Computer Society Annual Symposium on VLSI, 61-66, 2009 | 3 | 2009 |
| Exploiting clock skew scheduling for fpga S Bae, P Mangalagiri, N Vijaykrishnan 2009 Design, Automation & Test in Europe Conference & Exhibition, 1524-1529, 2009 | 3 | 2009 |
| Analog Layout Synthesis: Are We There Yet? P Mangalagiri Proceedings of the 2019 International Symposium on Physical Design, 127-127, 2019 | 1 | 2019 |
| FPGA routing architecture analysis under variations S Srinivasan, P Mangalagiri, Y Xie, N Vijaykrishnan 2007 25th International Conference on Computer Design, 152-157, 2007 | 1 | 2007 |
| Algorithm-architecture codesign for structured matrix operations on reconfigurable systems J Kim, P Mangalagiri, M Kandemir, V Narayanan, L Deng, K Sobti, ... Technical Report CS-2006-11, Department of Computer Science, Duke University, 2006 | 1 | 2006 |
| A reliable design flow for platform FPGAs P Mangalagiri The Pennsylvania State University, 2010 | | 2010 |
| Reconfigurable Systems-An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization JS Kim, L Deng, P Mangalagiri, K Irick, K Sobti, M Kandemir, V Narayanan, ... IEEE Transactions on Computers 58 (12), 1654, 2009 | | 2009 |
| FLAW S Srinivasan, P Mangalagiri, Y Xie, N Vijaykrishnan, K Sarpatwari Proceedings of the 43rd annual conference on Design automation-DAC'06, 2006 | | 2006 |
Vijaykrishnan NarayananRobert Noll Chair Professor at The Pennsylvania State UniversityAdresse e-mail validée de cse.psu.edu
