A constrained genetic algorithm for decentralized control system structure selection and optimization DR Lewin, A Parag Automatica 39 (10), 1801-1807, 2003 | 46 | 2003 |
Zero-cost MTP high density NVM modules in a CMOS process flow A Atrash, G Cassuto, W Chen, V Dayan, O Galzur, M Gutman, A Heiman, ... 2010 IEEE International Memory Workshop, 1-4, 2010 | 10 | 2010 |
Decentralized control system synthesis using a genetic algorithm A Parag, DR Lewin IFAC Proceedings Volumes 29 (1), 1175-1180, 1996 | 7 | 1996 |
Floating gate NVM with low-moisture-content oxide cap layer M Gutman, Y Roizin, A Parag, V Dayan US Patent 9,379,194, 2016 | 4 | 2016 |
Junction isolation for high voltage integrated circuits EO Arad, A Parag, E Aloni, A Eyal, Y Choi, S Shapira 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, 1-4, 2012 | 4 | 2012 |
Standard cell electrical and physical variability analysis based on automatic physical measurement for design-for-manufacturing purposes E Shauly, A Parag, H Khmaisy, U Krispil, O Adan, S Levi, S Latinski, ... Design for Manufacturability through Design-Process Integration V 7974, 295-301, 2011 | 4 | 2011 |
Device performances analysis of standard-cells transistors using silicon simulation and build-in device simulation EN Shauly, A Parag, U Krispil, I Rotstein Design for Manufacturability through Design-Process Integration IV 7641, 291-298, 2010 | 4 | 2010 |
Using genetic algorithms for MIMO control system structure selection and optimization A Parag, DR Lewin IFAC Proceedings Volumes 29 (8), 129-134, 1996 | 2 | 1996 |
700V integrated power management platform with record density logic A Parag, EO Arad, MC Yasour, E Lipp, K Sirota, S Shapira, E Aloni 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel …, 2014 | 1 | 2014 |
INTEGRATED 0.18 MICRON RF TECHNOLOGY PLATFORM WITH 1.8 V 5V 12V 25V & 42V MOS FOR HIGH DIGITAL CONTENT POWER RF APPLICATIONS FEATURING FT= 55 GHZ RFMOS AND FT> 17 GHZ 12V RF-LDMOS. S Levin, E Aloni, A Heiman, F Dulberg, N Shamay, A Parag, Z Kuritsky, ... IEEE RFIC Symposium, 2008 | 1 | 2008 |
Process control system synthesis using genetic algorithms A Parag Technion-Israel Institute of technology, Faculty of chemical engineering, 1996 | 1 | 1996 |
Method of forming high-voltage silicon-on-insulator device with diode connection to handle layer EO Arad, S Levin, A Parag, E Lipp, Y Avrahamov US Patent 10,522,388, 2019 | | 2019 |
High performance integrated inductors for power management applications A Eshkoli, S Bar-Lev, G Peled, Y Nemirovsky, A Parag, S Shapira 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel …, 2014 | | 2014 |
Top Electrode Patterning and Reliability Performance of MIM Capacitors Y Raskin, A Parag, M Levinger, O Eli, Y Roizin | | |