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Nayana Prasad Nagendra
Nayana Prasad Nagendra
Senior Engineer, Arm
Adresse e-mail validée de princeton.edu - Page d'accueil
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Asmdb: understanding and mitigating front-end stalls in warehouse-scale computers
G Ayers, NP Nagendra, DI August, HK Cho, S Kanev, C Kozyrakis, ...
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
862019
Architectural support for containment-based security
H Zhang, S Ghosh, J Fix, S Apostolakis, SR Beard, NP Nagendra, T Oh, ...
Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019
112019
Hardware multithreaded transactions
J Fix, NP Nagendra, S Apostolakis, H Zhang, S Qiu, DI August
Proceedings of the Twenty-Third International Conference on Architectural …, 2018
102018
Asmdb: Understanding and mitigating front-end stalls in warehouse-scale computers
NP Nagendra, G Ayers, DI August, HK Cho, S Kanev, C Kozyrakis, ...
IEEE Micro 40 (3), 56-63, 2020
92020
Improving instruction cache performance for modern processors with growing workloads
NP Nagendra
Princeton University, 2021
22021
EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching
NP Nagendra, BR Godala, I Chaturvedi, A Patel, S Kanev, T Moseley, ...
Proceedings of the 50th Annual International Symposium on Computer …, 2023
12023
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