A mapping flow for dynamically reconfigurable multi-core system-on-chip design I Beretta, V Rana, D Atienza, D Sciuto IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 110 | 2011 |
A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices AA Nacci, V Rana, F Bruschi, D Sciuto, I Beretta, D Atienza Proceedings of the 50th annual design automation conference, 1-6, 2013 | 39 | 2013 |
B˛IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks PR Grassi, V Rana, I Beretta, D Sciuto 2012 Ninth International Conference on Wearable and Implantable Body Sensor …, 2012 | 32 | 2012 |
Hardware/software approach for code synchronization in low-power multi-core sensor nodes R Braojos, A Dogan, I Beretta, G Ansaloni, D Atienza 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 24 | 2014 |
A hybrid mapping-scheduling technique for dynamically reconfigurable hardware JA Clemente, V Rana, D Sciuto, I Beretta, D Atienza 2011 21st International Conference on Field Programmable Logic and …, 2011 | 24 | 2011 |
A wireless body sensor network for activity monitoring with low transmission overhead R Braojos, I Beretta, J Constantin, A Burg, D Atienza 2014 12th IEEE International Conference on Embedded and Ubiquitous Computing …, 2014 | 22 | 2014 |
A mapping-scheduling algorithm for hardware acceleration on reconfigurable platforms JA Clemente, I Beretta, V Rana, D Atienza, D Sciuto ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2), 1-27, 2014 | 22 | 2014 |
Model-based design for wireless body sensor network nodes I Beretta, F Rincon, N Khaled, PR Grassi, V Rana, D Atienza, D Sciuto 2012 13th Latin American Test Workshop (LATW), 1-6, 2012 | 19 | 2012 |
Design exploration of energy-performance trade-offs for wireless sensor networks I Beretta, F Rincon, N Khaled, PR Grassi, V Rana, D Atienza Proceedings of the 49th Annual Design Automation Conference, 1043-1048, 2012 | 16 | 2012 |
Early classification of pathological heartbeats on wireless body sensor nodes R Braojos, I Beretta, G Ansaloni, D Atienza Sensors 14 (12), 22532-22551, 2014 | 13 | 2014 |
Efficient hardware design of iterative stencil loops V Rana, I Beretta, F Bruschi, AA Nacci, D Atienza, D Sciuto IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 11 | 2016 |
Knowledge-based design space exploration of wireless sensor networks PR Grassi, I Beretta, V Rana, D Atienza, D Sciuto Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2012 | 11 | 2012 |
Run-time mapping of applications on FPGA-based reconfigurable systems I Beretta, V Rana, D Atienza, D Sciuto 2010 IEEE International Symposium on Circuits and Systems (ISCAS), 3329-3332, 2010 | 11 | 2010 |
On-line task management for a reconfigurable cryptographic architecture I Beretta, V Rana, MD Santambrogio, D Sciuto 2009 IEEE International Symposium on Parallel & Distributed Processing, 1-4, 2009 | 10 | 2009 |
Operating system runtime management of partially dynamically reconfigurable embedded systems MD Santambrogio, V Rana, I Beretta, D Sciuto 2010 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, 1-10, 2010 | 9 | 2010 |
Parallelizing the Chambolle algorithm for performance-optimized mapping on FPGA devices I Beretta, V Rana, A Akin, AA Nacci, D Sciuto, D Atienza ACM Transactions on Embedded Computing Systems (TECS) 15 (3), 1-27, 2016 | 7 | 2016 |
A high-performance parallel implementation of the Chambolle algorithm A Akin, I Beretta, AA Nacci, V Rana, MD Santambrogio, D Atienza 2011 Design, Automation & Test in Europe, 1-6, 2011 | 7 | 2011 |
Design methods for parallel hardware implementation of multimedia iterative algorithms V Rana, I Beretta, D Atienza, AA Nacci, MD Santambrogio, D Sciuto IEEE Design & Test 30 (4), 71-80, 2013 | 6 | 2013 |
Island-based adaptable embedded system design I Beretta, V Rana, D Atienza, D Sciuto IEEE Embedded Systems Letters 3 (2), 53-57, 2011 | 6 | 2011 |
PushPush: Seamless integration of hardware and software objects via function calls over AXI ST Fleming, I Beretta, DB Thomas, GA Constantinides, DR Ghica 2015 25th International Conference on Field Programmable Logic and …, 2015 | 5 | 2015 |