Integrated circuit having multiple threshold voltages B Lee, JP Liu, M Joshi, M Eller, R Pal, RJ Carter, SB Samavedam
US Patent 9,362,180, 2016
348 2016 Self-aligned multiple patterning processes using bi-layer mandrels and cuts formed with block masks X Wang, SHU Jiehui, B O'Brien, TA Spooner, J Liu, RP Srivastava
US Patent App. 10/192,780, 2019
246 * 2019 High-k gate dielectrics with ultra-low leakage current based on praseodymium oxide HJ Osten, JP Liu, P Gaworzewski, E Bugiel, P Zaumseil
International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000
204 2000 Methods for fabricating a FINFET integrated circuit on a bulk silicon substrate Y Liu, X Yang, J Liu
US Patent 8,637,372, 2014
196 2014 Material architecture for the fabrication of low temperature transistor CF Tan, J Liu, H Lee, KC Tee, E Quek
US Patent 7,169,675, 2007
172 2007 Epitaxial growth of JP Liu, P Zaumseil, E Bugiel, HJ Osten
Applied Physics Letters 79 (5), 671-673, 2001
135 2001 Band gap and band discontinuities at crystalline HJ Osten, JP Liu, HJ Müssig
Applied physics letters 80 (2), 297-299, 2002
130 2002 End of range (EOR) secondary defect engineering using substitutional carbon doping CF Tan, J Liu, HJ Lee, B Indajang, EF Chor, SY Ong
US Patent 7,109,099, 2006
102 2006 Epitaxial praseodymium oxide: a new high-k dielectric HJ Osten, E Bugiel, A Fissel, T Guminskaya, JP Liu, HJ Mussig, ...
Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 …, 2001
102 2001 Growth of crystalline praseodymium oxide on silicon HJ Osten, JP Liu, E Bugiel, HJ Müssig, P Zaumseil
Journal of crystal growth 235 (1-4), 229-234, 2002
68 2002 Determination of Raman phonon strain shift coefficient of strained silicon and strained SiGe LH Wong, CC Wong, JP Liu, DK Sohn, L Chan, LC Hsia, H Zang, ZH Ni, ...
Japanese journal of applied physics 44 (11R), 7922, 2005
62 2005 Method for forming single diffusion breaks between finFET devices and the resulting devices H Yu, H Shen, Z Hu, JP Liu
US Patent 9,406,676, 2016
56 2016 Effect of porosity on the thermal-electric properties of Al-doped SiC ceramics KF Cai, JP Liu, CW Nan, XM Min
Journal of materials science letters 16 (22), 1876-1878, 1997
56 1997 Epitaxial growth of praseodymium oxide on silicon HJ Osten, JP Liu, E Bugiel, HJ Müssig, P Zaumseil
Materials Science and Engineering: B 87 (3), 297-302, 2001
52 2001 Initial stages of praseodymium oxide film formation on Si (001) HJ Müssig, J Dabrowski, K Ignatovich, JP Liu, V Zavodinsky, HJ Osten
Surface science 504, 159-166, 2002
50 2002 Method for forming air gap structure using carbon-containing spacer H Yu, B Zuo, JP Liu, H Liu
US Patent 9,443,956, 2016
49 2016 Integrated circuits including FINFET devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same WH Tong, H Liu, H Shen, JP Liu, S Kim
US Patent 9,087,870, 2015
47 2015 Epitaxial, high-K dielectrics on silicon: the example of praseodymium oxide HJ Osten, JP Liu, HJ Müssig, P Zaumseil
Microelectronics Reliability 41 (7), 991-994, 2001
47 2001 Facilitating fabricating gate-all-around nanowire field-effect transistors JP Liu, J Wan, A Wei
US Patent 9,263,520, 2016
44 2016 Implant damage control by in-situ C doping during SiGe epitaxy for device applications JP Liu, JR Holt
US Patent 7,947,546, 2011
43 2011 