P. MAURINE
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Contactless electromagnetic active attack on ring oscillator based true random number generator
P Bayon, L Bossuet, A Aubert, V Fischer, F Poucheret, B Robisson, ...
International Workshop on Constructive Side-Channel Analysis and Secure …, 2012
1302012
Injection of transient faults using electromagnetic pulses-Practical results on a cryptographic system-.
A Dehbaoui, JM Dutertre, B Robisson, P Orsatelli, P Maurine, A Tria
IACR Cryptol. ePrint Arch. 2012, 123, 2012
702012
Efficiency of a glitch detector against electromagnetic fault injection
L Zussa, A Dehbaoui, K Tobich, JM Dutertre, P Maurine, ...
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
652014
Transition time modeling in deep submicron CMOS
P Maurine, M Rezzoug, N Azemard, D Auvergne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002
622002
Temperature-and voltage-aware timing analysis
B Lasbouygues, R Wilson, N Azemard, P Maurine
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
572007
Local and direct em injection of power into cmos integrated circuits
F Poucheret, K Tobich, M Lisarty, L Chusseauz, B Robissonx, P Maurine
2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 100-104, 2011
532011
Attacking randomized exponentiations using unsupervised learning
G Perin, L Imbert, L Torres, P Maurine
International Workshop on Constructive Side-Channel Analysis and Secure …, 2014
502014
Near-field mapping system to scan in time domain the magnetic emissions of integrated circuits
T Ordas, M Lisart, E Sicard, P Maurine, L Torres
International Workshop on Power and Timing Modeling, Optimization and …, 2008
452008
Logical effort model extension to propagation delay representation
B Lasbouygues, S Engels, R Wilson, P Maurine, N Azémard, D Auvergne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
432006
Evidence of a larger EM-induced fault model
S Ordas, L Guillaume-Sage, K Tobich, JM Dutertre, P Maurine
International Conference on Smart Card Research and Advanced Applications …, 2014
422014
Static implementation of QDI asynchronous primitives
P Maurine, JB Rigaud, F Bouesse, G Sicard, M Renaudin
International Workshop on Power and Timing Modeling, Optimization and …, 2003
412003
EM injection: Fault model and locality
S Ordas, L Guillaume-Sage, P Maurine
2015 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), 3-13, 2015
392015
Techniques for em fault injection: equipments and experimental results
P Maurine
2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 3-4, 2012
372012
An on-chip technique to detect hardware trojans and assist counterfeit identification
M Lecomte, J Fournier, P Maurine
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (12 …, 2016
362016
Evaluating the robustness of secure triple track logic through prototyping
R Soares, N Calazans, V Lomné, P Maurine, L Torres, M Robert
Proceedings of the 21st annual symposium on Integrated circuits and system …, 2008
352008
Improvement of dual rail logic as a countermeasure against DPA
A Razafindraibe, M Robert, P Maurine
2007 IFIP International Conference on Very Large Scale Integration, 270-275, 2007
292007
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
V Lomné, P Maurine, L Torres, M Robert, R Soares, N Calazans
2009 Design, Automation & Test in Europe Conference & Exhibition, 634-639, 2009
282009
Embedding statistical tests for on-chip dynamic voltage and temperature monitoring
L Vincent, P Maurine, S Lesecq, E Beigné
Proceedings of the 49th Annual Design Automation Conference, 994-999, 2012
272012
Magnetic microprobe design for em fault attack
R Omarouayache, J Raoult, S Jarrix, L Chusseau, P Maurine
2013 International Symposium on Electromagnetic Compatibility, 949-954, 2013
262013
Electromagnetic fault injection: the curse of flip-flops
S Ordas, L Guillaume-Sage, P Maurine
Journal of Cryptographic Engineering 7 (3), 183-197, 2017
252017
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