Vijaykrishnan Narayanan

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Mary Jane (Janie) IrwinEmerita Evan Pugh University Professor, CSE, Penn State UniversityAdresse e-mail validée de cse.psu.edu
Mahmut KandemirPennsylvania State UniversityAdresse e-mail validée de psu.edu
Suman DattaJoseph M. Pettit Chair ProfessorAdresse e-mail validée de gatech.edu
Yuan XieChair Professor of Hong Kong University of Science and Technology (HKUST)Adresse e-mail validée de ust.hk
Jack SampsonAssociate Professor, Pennsylvania State UniversityAdresse e-mail validée de psu.edu
Xueqing LiAssociate Professor, Tsinghua UniversityAdresse e-mail validée de tsinghua.edu.cn
Chita R. DasPenn State UniversityAdresse e-mail validée de cse.psu.edu
Chrysostomos NicopoulosAssociate Professor, Department of ECE, University of CyprusAdresse e-mail validée de ucy.ac.cy
Anand SivasubramaniamDistinguished Professor of Computer Science & Engineering, Penn State UniversityAdresse e-mail validée de cse.psu.edu
Huichu LiuIntel Labs, Intel CorporationAdresse e-mail validée de intel.com
Sumeet GuptaSchool of Electrical and Computer Engineering, Purdue UniversityAdresse e-mail validée de purdue.edu
Kaisheng MaInstitute for Interdisciplinary Information Sciences, Tsinghua UniversityAdresse e-mail validée de mail.tsinghua.edu.cn
Dongkook ParkIBM CorporationAdresse e-mail validée de us.ibm.com
Ramakrishnan KrishnanTaiwan Semiconductor Manufacturing Company (TSMC)Adresse e-mail validée de tsmc.com
vinay saripalliPhD in computer Science and Engineering, Penn State UniversityAdresse e-mail validée de psu.edu
Ahmedullah AzizAssistant Professor, University of Tennessee, KnoxvilleAdresse e-mail validée de utk.edu
Theocharis (Theo) TheocharidesAssociate Professor, ECE , KIOS Research and Innovation Center of Excellence, University of CyprusAdresse e-mail validée de ucy.ac.cy
Soumya EachempatiPennsylvania State UniversityAdresse e-mail validée de intel.com
Asit MishraNvidiaAdresse e-mail validée de nvidia.com
Karthik SwaminathanIBM Watson ResearchAdresse e-mail validée de us.ibm.com

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Vijaykrishnan Narayanan

Robert Noll Chair Professor at The Pennsylvania State University

Adresse e-mail validée de cse.psu.edu - Page d'accueil

Computer Architecture Embedded Systems


Titre Trier par citations Trier par année Trier par titre	Citée par Citée par	Année
Leakage current: Moore's law meets static power NS Kim, T Austin, D Baauw, T Mudge, K Flautner, JS Hu, MJ Irwin, ... computer 36 (12), 68-75, 2003	1792	2003
The design and use of simplepower: a cycle-accurate energy estimation tool W Ye, N Vijaykrishnan, M Kandemir, MJ Irwin Proceedings of the 37th Annual Design Automation Conference, 340-345, 2000	682	2000
Design and management of 3D chip multiprocessors using network-in-memory F Li, C Nicopoulos, T Richardson, Y Xie, V Narayanan, M Kandemir ACM SIGARCH Computer Architecture News 34 (2), 130-141, 2006	550	2006
Analysis of error recovery schemes for networks on chips S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ... IEEE Design & Test of Computers 22 (5), 434-442, 2005	443	2005
ViChaR: A dynamic virtual channel regulator for network-on-chip routers CA Nicopoulos, D Park, J Kim, N Vijaykrishnan, MS Yousif, CR Das 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006	428	2006
Dynamic management of scratch-pad memory space M Kandemir, J Ramanujam, J Irwin, N Vijaykrishnan, I Kadayif, A Parikh Proceedings of the 38th annual Design Automation Conference, 690-695, 2001	401	2001
A novel dimensionally-decomposed router for on-chip communication in 3D architectures J Kim, C Nicopoulos, D Park, R Das, Y Xie, V Narayanan, MS Yousif, ... Proceedings of the 34th annual international symposium on Computer …, 2007	363	2007
A low latency router supporting adaptivity for on-chip interconnects J Kim, D Park, T Theocharides, N Vijaykrishnan, CR Das Proceedings of the 42nd annual Design Automation Conference, 559-564, 2005	359	2005
Cache revive: Architecting volatile STT-RAM caches for enhanced performance in CMPs A Jog, AK Mishra, C Xu, Y Xie, V Narayanan, R Iyer, CR Das Proceedings of the 49th Annual Design Automation Conference, 243-252, 2012	356	2012
Energy-driven integrated hardware-software optimizations using SimplePower N Vijaykrishnan, M Kandemir, MJ Irwin, HS Kim, W Ye ACM SIGARCH Computer Architecture News 28 (2), 95-106, 2000	350	2000
Exploring fault-tolerant network-on-chip architectures D Park, C Nicopoulos, J Kim, N Vijaykrishnan, CR Das International Conference on Dependable Systems and Networks (DSN'06), 93-104, 2006	321	2006
Fault tolerant algorithms for network-on-chip interconnect M Pirretti, GM Link, RR Brooks, N Vijaykrishnan, M Kandemir, MJ Irwin IEEE computer society annual symposium on VLSI, 46-51, 2004	309	2004
A gracefully degrading and energy-efficient modular router architecture for on-chip networks J Kim, C Nicopoulos, D Park, V Narayanan, MS Yousif, CR Das ACM SIGARCH Computer Architecture News 34 (2), 4-15, 2006	305	2006
MIRA: A multi-layered on-chip interconnect router architecture D Park, S Eachempati, R Das, AK Mishra, Y Xie, N Vijaykrishnan, CR Das ACM SIGARCH Computer Architecture News 36 (3), 251-261, 2008	301	2008
Using complete machine simulation for software power estimation: The softwatt approach S Gurumurthi, A Sivasubramaniam, MJ Irwin, N Vijaykrishnan, ... Proceedings Eighth International Symposium on High Performance Computer …, 2002	297	2002
Architecture exploration for ambient energy harvesting nonvolatile processors K Ma, Y Zheng, S Li, K Swaminathan, X Li, Y Liu, J Sampson, Y Xie, ... 2015 IEEE 21st International Symposium on High Performance Computer …, 2015	291	2015
Reducing leakage energy in FPGAs using region-constrained placement A Gayasen, Y Tsai, N Vijaykrishnan, M Kandemir, MJ Irwin, T Tuan Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004	285	2004
Temperature-Dependent–Characteristics of a VerticalTunnel FET S Mookerjea, D Mohata, T Mayer, V Narayanan, S Datta IEEE Electron Device Letters 31 (6), 564-566, 2010	258	2010
DRAM energy management using software and hardware directed power mode control V Delaluz, M Kandemir, N Vijaykrishnan, A Sivasubramaniam, MJ Irwin Proceedings HPCA Seventh International Symposium on High-Performance …, 2001	255	2001
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs R Das, S Eachempati, AK Mishra, V Narayanan, CR Das 2009 IEEE 15th International Symposium on High Performance Computer …, 2009	254	2009

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