Signature verification using a" siamese" time delay neural network J Bromley, I Guyon, Y LeCun, E Säckinger, R Shah Advances in neural information processing systems 6, 1993 | 5422 | 1993 |
Comparison of classifier methods: a case study in handwritten digit recognition L Bottou, C Cortes, JS Denker, H Drucker, I Guyon, LD Jackel, Y LeCun, ... Proceedings of the 12th IAPR International Conference on Pattern Recognition …, 1994 | 1096 | 1994 |
Comparison of learning algorithms for handwritten digit recognition Y LeCun, L Jackel, L Bottou, A Brunot, C Cortes, J Denker, H Drucker, ... International conference on artificial neural networks 60 (1), 53-60, 1995 | 963 | 1995 |
Learning algorithms for classification: A comparison on handwritten digit recognition Y LeCun, LD Jackel, L Bottou, C Cortes, JS Denker, H Drucker, I Guyon, ... Neural networks: the statistical mechanics perspective 261 (276), 2, 1995 | 876 | 1995 |
A high-swing, high-impedance MOS cascode circuit E Sackinger, W Guggenbuhl IEEE Journal of Solid-state circuits 25 (1), 289-298, 2002 | 724 | 2002 |
Broadband circuits for optical fiber communication E Säckinger John Wiley & Sons, 2005 | 705 | 2005 |
A versatile building block: the CMOS differential difference amplifier E Sackinger, W Guggenbuhl IEEE Journal of Solid-State Circuits 22 (2), 287-294, 1987 | 524 | 1987 |
A 3-GHz 32-dB CMOS limiting amplifier for SONET OC-48 receivers E Sackinger, WC Fischer IEEE Journal of Solid-State Circuits 35 (12), 1884-1888, 2000 | 311 | 2000 |
An analog neural network processor with programmable topology BE Boser, E Sackinger, J Bromley, Y Le Cun, LD Jackel IEEE Journal of Solid-State Circuits 26 (12), 2017-2025, 1991 | 245 | 1991 |
Application of the ANNA neural network chip to high-speed character recognition E Säckinger, BE Boser, JM Bromley, Y LeCun, LD Jackel IEEE Transactions on Neural Networks 3 (3), 498-505, 1992 | 207 | 1992 |
The transimpedance limit E Säckinger IEEE transactions on circuits and systems I: regular papers 57 (8), 1848-1856, 2010 | 194 | 2010 |
A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP B Ackland, A Anesko, D Brinthaupt, SJ Daubert, A Kalavade, J Knobloch, ... IEEE Journal of Solid-state circuits 35 (3), 412-424, 2000 | 185 | 2000 |
Analysis and design of transimpedance amplifiers for optical receivers E Säckinger John Wiley & Sons, 2017 | 177 | 2017 |
An analog trimming circuit based on a floating-gate device E Sackinger, W Guggenbuhl IEEE Journal of Solid-State Circuits 23 (6), 1437-1440, 1988 | 134 | 1988 |
A 15-mW, 155-Mb/s CMOS burst-mode laser driver with automatic power control and end-of-life detection E Sackinger, Y Ota, TJ Gabara, WC Fischer IEEE Journal of Solid-State Circuits 35 (2), 269-275, 2000 | 84 | 2000 |
Hardware requirements for neural network pattern classifiers: A case study and implementation BE Boser, E Sackinger, J Bromley, LD Jackel IEEE micro 12 (1), 32-40, 1992 | 59 | 1992 |
Advances in neural information processing systems J Bromley, I Guyon, Y LeCun, E Säckinger, R Shah Volume, 1993 | 49 | 1993 |
Neural-network and k-nearest-neighbor classifiers J Bromley, E Sackinger Rapport technique, 11359-910819, 1991 | 48 | 1991 |
On the noise optimum of FET broadband transimpedance amplifiers E Sackinger IEEE Transactions on Circuits and Systems I: Regular Papers 59 (12), 2881-2889, 2012 | 45 | 2012 |
A general relationship between amplifier parameters, and its application to PSRR improvement E Sackinger, J Goette, W Guggenbuhl IEEE transactions on circuits and systems 38 (10), 1173-1181, 1991 | 40 | 1991 |