César Marcon
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Exploring NoC mapping strategies: an energy and timing aware technique
C Marcon, N Calazans, F Moraes, A Susin, I Reis, F Hessel
Conference on Design, Automation and Test in Europe (DATE), 502-507, 2005
Time and energy efficient mapping of embedded applications onto NoCs
C Marcon, A Borin, A Susin, L Carro, F Wagner
Asia and South Pacific Design Automation Conference (ASP-DAC) 1, 33-38, 2005
Architectural Support for Task Migration Concerning MPSoC
A Aguiar Filho, C Marcon, F Hessel
XXVIII Congresso da SBC, 2008
Comparison of network-on-chip mapping algorithms targeting low energy consumption
C Marcon, E Moreno, N Calazans, F Moraes
Computers & Digital Techniques, IET 2 (6), 471-482, 2008
RTOS scheduler implementation in hardware and software for real time applications
M Vetromille, L Ost, C Marcon, C Reif, F Hessel
Rapid System Prototyping, 2006. Seventeenth IEEE International Workshop on …, 2006
Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures
M Kreutz, C Marcon, L Carro, F Wagner, A Susin
Annual Symposium on Integrated Circuits and System Design (SBCCI), 190-195, 2005
Energy and latency evaluation of noc topologies
M Kreutz, C Marcon, L Carro, N Calazans, AA Susin
IEEE International Symposium on Circuits and Systems (ISCAS), 5866-5869, 2005
Evaluation of static and dynamic task mapping algorithms in NoC-based MPSoCs
E Carvalho, C Marcon, N Calazans, F Moraes
2009 International Symposium on System-on-Chip, 087-090, 2009
Exploiting modbus protocol in wired and wireless multilevel communication architecture
GBM Guarese, FG Sieben, T Webber, MR Dillenburg, C Marcon
Computing System Engineering (SBESC), 2012 Brazilian Symposium on, 13-18, 2012
Fast 3D-HEVC depth map encoding using machine learning
M Saldanha, G Sanchez, C Marcon, L Agostini
IEEE Transactions on Circuits and Systems for Video Technology 30 (3), 850-861, 2019
A security aware routing approach for NoC-based MPSoCs
R Fernandes, C Marcon, R Cataldo, J Silveira, G Sigl, J Sepúlveda
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016
DMNI: A specialized network interface for NoC-based MPSoCs
M Ruaro, FB Lazzarotto, CA Marcon, FG Moraes
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1202-1205, 2016
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation
JCS Palma, C Marcon, FG Moraes, NLV Calazans, RAL Reis, AA Susin
Proceedings of the 18th annual symposium on Integrated circuits and system …, 2005
Selection of enterprise resource planning software using analytic hierarchy process
RM Czekster, T Webber, AH Jandrey, CAM Marcon
Enterprise Information Systems 13 (6), 895-915, 2019
Survey of standardized ISO 18000-6 RFID anti-collision protocols
M Azambuja, C Marcon, FP Hessel
Sensor Technologies and Applications, 2008. SENSORCOMM'08. Second …, 2008
Abstract RTOS modeling for embedded systems
F Hessel, VM da Rosa, IM Reis, R Planner, C Marcon, A Susin
IEEE International Workshop on Rapid System Prototyping (RSP), 210-216, 2004
Real-time scalable hardware architecture for 3D-HEVC bipartition modes
G Sanchez, C Marcon, L Agostini
Journal of Real-Time Image Processing, 1-13, 2016
Evaluation of algorithms for low energy mapping onto NoCs
C Marcon, EI Moreno, NLV Calazans, FG Moraes
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on, 389-392, 2007
Complexity analysis of VVC intra coding
M Saldanha, G Sanchez, C Marcon, L Agostini
2020 IEEE International Conference on Image Processing (ICIP), 3119-3123, 2020
Modeling the traffic effect for the application cores mapping problem onto NoCs
C Marcon, JCS Palma, NLV Calazans, FG Moraes, AA Susin, R Reis
Vlsi-Soc: From Systems To Silicon, 179-194, 2007
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