A systematic dnn weight pruning framework using alternating direction method of multipliers T Zhang, S Ye, K Zhang, J Tang, W Wen, M Fardad, Y Wang Proceedings of the European conference on computer vision (ECCV), 184-199, 2018 | 553 | 2018 |
Feature distillation: Dnn-oriented jpeg compression against adversarial examples Z Liu, Q Liu, T Liu, N Xu, X Lin, Y Wang, W Wen 2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR …, 2019 | 305 | 2019 |
DeepN-JPEG: A deep neural network favorable JPEG-based image compression framework Z Liu, T Liu, W Wen, L Jiang, J Xu, Y Wang, G Quan Proceedings of the 55th annual design automation conference, 1-6, 2018 | 119 | 2018 |
Multi-level cell STT-RAM: Is it realistic or just a dream? Y Zhang, L Zhang, W Wen, G Sun, Y Chen Proceedings of the International Conference on Computer-Aided Design, 526-532, 2012 | 115 | 2012 |
AOS: Adaptive overwrite scheme for energy-efficient MLC STT-RAM cache X Chen, N Khoshavi, J Zhou, D Huang, RF DeMara, J Wang, W Wen, ... Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 100 | 2016 |
Exploration of GPGPU register file architecture using domain-wall-shift-write based racetrack memory M Mao, W Wen, Y Zhang, Y Chen, H Li Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 90 | 2014 |
E-RNN: Design optimization for efficient recurrent neural networks in FPGAs Z Li, C Ding, S Wang, W Wen, Y Zhuo, C Liu, Q Qiu, W Xu, X Lin, X Qian, ... 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 89 | 2019 |
Defensive dropout for hardening deep neural networks under adversarial attacks S Wang, X Wang, P Zhao, W Wen, D Kaeli, P Chin, X Lin 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 89 | 2018 |
Xnor-pop: A processing-in-memory architecture for binary convolutional neural networks in wide-io2 drams L Jiang, M Kim, W Wen, D Wang 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 86 | 2017 |
Adam-admm: A unified, systematic framework of structured weight pruning for dnns T Zhang, K Zhang, S Ye, J Li, J Tang, W Wen, X Lin, M Fardad, Y Wang arXiv preprint arXiv:1807.11091 2 (3), 2018 | 78 | 2018 |
A fault-tolerant neural network architecture T Liu, W Wen, L Jiang, Y Wang, C Yang, G Quan Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 72 | 2019 |
On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations Y Chen, WF Wong, H Li, CK Koh, Y Zhang, W Wen ACM Journal on Emerging Technologies in Computing Systems (JETC) 9 (2), 1-22, 2013 | 63 | 2013 |
Security analysis and enhancement of model compressed deep learning systems under adversarial attacks Q Liu, T Liu, Z Liu, Y Wang, Y Jin, W Wen 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 721-726, 2018 | 60 | 2018 |
Tiny but accurate: A pruned, quantized and optimized memristor crossbar framework for ultra efficient dnn implementation X Ma, G Yuan, S Lin, C Ding, F Yu, T Liu, W Wen, X Chen, Y Wang 2020 25th Asia and South Pacific design automation conference (ASP-DAC), 301-306, 2020 | 59 | 2020 |
Progressive dnn compression: A key to achieve ultra-high weight pruning and quantization rates using admm S Ye, X Feng, T Zhang, X Ma, S Lin, Z Li, K Xu, W Wen, S Liu, J Tang, ... arXiv preprint arXiv:1903.09769, 2019 | 59 | 2019 |
CD-ECC: Content-dependent error correction codes for combating asymmetric nonvolatile memory operation errors W Wen, M Mao, X Zhu, SH Kang, D Wang, Y Chen 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2013 | 58 | 2013 |
Energy-aware adaptive restore schemes for MLC STT-RAM cache X Chen, N Khoshavi, RF DeMara, J Wang, D Huang, W Wen, Y Chen IEEE Transactions on Computers 66 (5), 786-798, 2016 | 54 | 2016 |
A length adaptive algorithm-hardware co-design of transformer on fpga through sparse attention and dynamic pipelining H Peng, S Huang, S Chen, B Li, T Geng, A Li, W Jiang, W Wen, J Bi, H Liu, ... Proceedings of the 59th ACM/IEEE Design Automation Conference, 1135-1140, 2022 | 53 | 2022 |
State-restrict MLC STT-RAM designs for high-reliable high-performance memory system W Wen, Y Zhang, M Mao, Y Chen Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 53 | 2014 |
The prospect of STT-RAM scaling from readability perspective Y Zhang, W Wen, Y Chen IEEE Transactions on Magnetics 48 (11), 3035-3038, 2012 | 51 | 2012 |