| Multiple stuck-at fault testability analysis of ROBDD based combinational circuit design T Shah, A Matrosova, M Fujita, V Singh Journal of Electronic Testing 34, 53-65, 2018 | 12 | 2018 |
| Test pattern generation to detect multiple faults in ROBDD based combinational circuits T Shah, A Matrosova, V Singh 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System …, 2017 | 12 | 2017 |
| ROBDD based path delay fault testable combinational circuit synthesis T Shah, V Singh, A Matrosova 2016 IEEE East-West Design & Test Symposium (EWDTS), 1-4, 2016 | 10 | 2016 |
| Testing multiple stuck-at faults of robdd based combinational circuit design T Shah, A Matrosova, B Kumar, M Fujita, V Singh 2017 18th IEEE Latin American Test Symposium (LATS), 1-6, 2017 | 8 | 2017 |
| PDF testability of a combinational circuit derived by covering ROBDD nodes using Invert-And-Or circuits T Shah, A Matrosova, V Singh 2015 19th International Symposium on VLSI Design and Test, 1-2, 2015 | 4 | 2015 |
| Multiple stuck-at fault testability of a combinational circuit derived by covering ROBDD nodes by Invert-And-Or sub-circuits A Matrosova, E Mitrofanov, T Shah 2015 IEEE East-West Design & Test Symposium (EWDTS), 1-4, 2015 | 2 | 2015 |
| Simplification of fully delay testable combinational circuits A Matrosova, E Mitrofanov, T Shah 2015 IEEE 21st International On-Line Testing Symposium (IOLTS), 44-45, 2015 | 1 | 2015 |
| Fully Testable Circuit Synthesis for Delay and Multiple Stuck-at Faults TA Shah Indian Institute of Technology Bombay Mumbai 400076 (India) 27, 2018 | | 2018 |
| Multiple stuck-at fault testability analysis of ROBDD based combinational circuit design AY Matrosova, M Fujita, V Singh, T Shah Journal of electronic testing. 2018. Vol. 34,№ 1. P. 53-65, 2018 | | 2018 |
| Упрощение контролепригодных комбинационных схем и поиск тестовых пар для неисправностей задержек путей AY Matrosova, EV Mitrofanov, T Shah Вестник Томского государственного университета. Управление, вычислительная …, 2017 | | 2017 |
| LATS 2017-18TH IEEE LATIN-AMERICAN TEST SYMPOSIUM F Benevenuti, FL Kastensmidt, T Shah, B Kumar, V Singh, A Matrosova, ... | | 2017 |
