| EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods V Mrazek, R Hrbacek, Z Vasicek, L Sekanina Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 110 | 2017 |
| Evolutionary approach to approximate digital circuits design Z Vasicek, L Sekanina IEEE Transactions on Evolutionary Computation 19 (3), 432-444, 2014 | 84 | 2014 |
| Design of power-efficient approximate multipliers for approximate artificial neural networks V Mrazek, SS Sarwar, L Sekanina, Z Vasicek, K Roy Proceedings of the 35th International Conference on Computer-Aided Design, 1-7, 2016 | 80 | 2016 |
| Novel hardware implementation of adaptive median filters Z Vasicek, L Sekanina 2008 11th IEEE workshop on design and diagnostics of electronic circuits and …, 2008 | 77 | 2008 |
| An evolvable hardware system in Xilinx Virtex II Pro FPGA Z Vasicek, L Sekanina International Journal of Innovative Computing and Applications 1 (1), 63-73, 2007 | 72 | 2007 |
| Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware Z Vasicek, L Sekanina Genetic Programming and Evolvable Machines 12 (3), 305-327, 2011 | 52 | 2011 |
| Repomo32-new reconfigurable polymorphic integrated circuit for adaptive hardware L Sekanina, R Ruzicka, Z Vasicek, R Prokop, L Fujcik 2009 IEEE Workshop on Evolvable and Adaptive Hardware, 39-46, 2009 | 49 | 2009 |
| Approximate circuit design by means of evolvable hardware L Sekanina, Z Vasicek 2013 IEEE International Conference on Evolvable Systems (ICES), 21-28, 2013 | 37 | 2013 |
| Efficient phenotype evaluation in cartesian genetic programming Z Vašíček, K Slaný European Conference on Genetic Programming, 266-278, 2012 | 33 | 2012 |
| Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished M Češka, J Matyáš, V Mrazek, L Sekanina, Z Vasicek, T Vojnar 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 416-423, 2017 | 31 | 2017 |
| Adaptive and energy-efficient architectures for machine learning: Challenges, opportunities, and research roadmap M Shafique, R Hafiz, MU Javed, S Abbas, L Sekanina, Z Vasicek, ... 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 627-632, 2017 | 31 | 2017 |
| Hardware accelerator of cartesian genetic programming with multiple fitness units Z Vašíček, L Sekanina Computing and Informatics 29 (6+), 1359-1371, 2012 | 30 | 2012 |
| Hardware accelerators for cartesian genetic programming Z Vasicek, L Sekanina European Conference on Genetic Programming, 230-241, 2008 | 30 | 2008 |
| An area-efficient alternative to adaptive median filtering in fpgas Z Vasicek, L Sekanina 2007 International Conference on Field Programmable Logic and Applications …, 2007 | 30 | 2007 |
| Evaluation of a new platform for image filter evolution Z Vasicek, L Sekanina Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 577-586, 2007 | 30 | 2007 |
| Cartesian GP in optimization of combinational circuits with hundreds of inputs and thousands of gates Z Vasicek European Conference on Genetic Programming, 139-150, 2015 | 29 | 2015 |
| Evolutionary design of complex approximate combinational circuits Z Vasicek, L Sekanina Genetic Programming and Evolvable Machines 17 (2), 169-192, 2016 | 27 | 2016 |
| Towards low power approximate DCT architecture for HEVC standard Z Vasicek, V Mrazek Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 26 | 2017 |
| Evolutionary design of approximate multipliers under different error metrics Z Vasicek, L Sekanina 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | 25 | 2014 |
| On evolutionary synthesis of linear transforms in FPGA Z Vašíček, M Žádník, L Sekanina, J Tobola International Conference on Evolvable Systems, 141-152, 2008 | 25 | 2008 |
Lukas SekaninaProfessor of Computer Science and Engineering, Brno University of TechnologyAdresse e-mail validée de fit.vutbr.cz
