Systematic design of RSA processors based on high-radix Montgomery multipliers A Miyamoto, N Homma, T Aoki, A Satoh
IEEE Transactions on very large scale integration (VLSI) Systems 19 (7 …, 2010
100 2010 Collision-based power analysis of modular exponentiation using chosen-message pairs N Homma, A Miyamoto, T Aoki, A Satoh, A Shamir
International Workshop on Cryptographic Hardware and Embedded Systems, 15-29, 2008
90 2008 High-performance concurrent error detection scheme for AES hardware A Satoh, T Sugawara, N Homma, T Aoki
International Workshop on Cryptographic Hardware and Embedded Systems, 100-112, 2008
82 2008 High-resolution side-channel attack using phase-based waveform matching N Homma, S Nagashima, Y Imai, T Aoki, A Satoh
International Workshop on Cryptographic Hardware and Embedded Systems, 187-200, 2006
81 2006 An on-chip glitchy-clock generator for testing fault injection attacks S Endo, T Sugawara, N Homma, T Aoki, A Satoh
Journal of Cryptographic Engineering 1 (4), 265-270, 2011
75 2011 Comparative power analysis of modular exponentiation algorithms N Homma, A Miyamoto, T Aoki, A Satoh, A Samir
IEEE Transactions on Computers 59 (6), 795-807, 2009
70 2009 Fair and consistent hardware evaluation of fourteen round two SHA-3 candidates M Knezevic, K Kobayashi, J Ikegami, S Matsuo, A Satoh, Ü Kocabas, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (5), 827-840, 2011
69 2011 Analysis of electromagnetic information leakage from cryptographic devices with different physical structures YI Hayashi, N Homma, T Mizuki, T Aoki, H Sone, L Sauvage, JL Danger
IEEE Transactions on Electromagnetic Compatibility 55 (3), 571-580, 2012
66 2012 A threat for tablet pcs in public space: Remote visualization of screen images using em emanation Y Hayashi, N Homma, M Miura, T Aoki, H Sone
Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications …, 2014
61 2014 Em attack is non-invasive?-design methodology and validity verification of em attack sensor N Homma, Y Hayashi, N Miura, D Fujimoto, D Tanaka, M Nagata, T Aoki
International Workshop on Cryptographic Hardware and Embedded Systems, 1-16, 2014
43 2014 Graph-based evolutionary design of arithmetic circuits D Chen, T Aoki, N Homma, T Terasaki, T Higuchi
IEEE Transactions on Evolutionary Computation 6 (1), 86-100, 2002
41 2002 Efficient evaluation of EM radiation associated with information leakage from cryptographic devices Y Hayashi, N Homma, T Mizuki, H Shimada, T Aoki, H Sone, L Sauvage, ...
IEEE Transactions on Electromagnetic Compatibility 55 (3), 555-563, 2012
39 2012 Non-invasive EMI-based fault injection attack against cryptographic modules Y Hayashi, N Homma, T Sugawara, T Mizuki, T Aoki, H Sone
2011 IEEE International Symposium on Electromagnetic Compatibility, 763-767, 2011
39 2011 Introduction to the special section on electromagnetic information security YI Hayashi, N Homma, T Watanabe, WO Price, WA Radasky
IEEE Transactions on Electromagnetic Compatibility 55 (3), 539-546, 2013
38 2013 Biasing power traces to improve correlation power analysis attacks Y Kim, T Sugawara, N Homma, T Aoki, A Satoh
First international workshop on constructive side-channel analysis and …, 2010
38 2010 Highly Efficient Inversion Circuit Based on Redundant GF Arithmetic and Its Application to AES Design R Ueno, N Homma, Y Sugawara, Y Nogami, T Aoki
International Workshop on Cryptographic Hardware and Embedded Systems, 63-80, 2015
36 2015 Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques O Meynard, D Réal, F Flament, S Guilley, N Homma, JL Danger
2011 Design, Automation & Test in Europe, 1-6, 2011
36 2011 Formal design of arithmetic circuits based on arithmetic description language N Homma, Y Watanabe, T Aoki, T Higuchi
IEICE transactions on fundamentals of electronics, communications and …, 2006
35 2006 DPA using phase-based waveform matching against random-delay countermeasure S Nagashima, N Homma, Y Imai, T Aoki, A Satoh
2007 IEEE International Symposium on Circuits and Systems, 1807-1810, 2007
34 2007 A high throughput/gate AES hardware architecture by compressing encryption and decryption datapaths R Ueno, S Morioka, N Homma, T Aoki
International conference on cryptographic hardware and embedded systems, 538-558, 2016
33 2016