| HPVM2FPGA: Enabling true hardware-agnostic FPGA programming A Ejjeh, L Medvinsky, A Councilman, H Nehra, S Sharma, V Adve, L Nardi, ... 2022 IEEE 33rd International Conference on Application-specific Systems …, 2022 | 11 | 2022 |
| Trireme: Exploring hierarchical multi-level parallelism for domain specific hardware acceleration G Zacharopoulos, A Ejjeh, Y Jing, EY Yang, T Jia, I Brumar, J Intan, ... arXiv preprint arXiv:2201.08603, 2022 | 6 | 2022 |
| Trireme: Exploration of hierarchical multi-level parallelism for hardware acceleration G Zacharopoulos, A Ejjeh, Y Jing, EY Yang, T Jia, I Brumar, J Intan, ... ACM Transactions on Embedded Computing Systems 22 (3), 1-23, 2023 | 5 | 2023 |
| HPVM: Hardware-agnostic programming for heterogeneous parallel systems A Ejjeh, A Councilman, A Kothari, M Kotsifakou, L Medvinsky, AR Noor, ... IEEE Micro 42 (5), 108-117, 2022 | 5 | 2022 |
| Baco: A fast and portable Bayesian compiler optimization framework EO Hellsten, A Souza, J Lenfers, R Lacouture, O Hsu, A Ejjeh, F Kjolstad, ... Proceedings of the 28th ACM International Conference on Architectural …, 2023 | 3 | 2023 |
| Studying the potential of automatic optimizations in the Intel FPGA SDK for OpenCL A Ejjeh, V Adve, R Rutenbar arXiv preprint arXiv:2201.03558, 2022 | 3 | 2022 |
| Compiler techniques for enabling general-purpose hardware-agnostic FPGA programming A Ejjeh University of Illinois at Urbana-Champaign, 2022 | | 2022 |
| Architecture performance simulator for the disjoint out-of-order execution processor (DOE) and the OpenDOE API AJ Ejjeh Theses, Dissertations, and Projects, 2015 | | 2015 |
| Haase, Julian 156 Haering, Tim 139 Hao, Cong 11, 131 Hepola, Kari 161 D Abts, V Adve, R Agrawal, I Ahmed, MAZ Alves, R Andri, LS Araújo, ... | | |
| Simplifying High Level Synthesis through Compiler Techniques A Ejjeh, V Adve, S Adve, L Carloni, R Rutenbar | | |
