| Accurate deep neural network inference using computational phase-change memory V Joshi, M Le Gallo, S Haefeli, I Boybat, SR Nandakumar, C Piveteau, ... Nature communications 11 (1), 2473, 2020 | 382 | 2020 |
| 6.1 A 100Gb/s 1.1 pJ/b PAM-4 RX with dual-mode 1-tap PAM-4/3-tap NRZ speculative DFE in 14nm CMOS FinFET A Cevrero, I Ozkaya, PA Francese, M Brandli, C Menolfi, T Morf, M Kossel, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 112-114, 2019 | 62 | 2019 |
| A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference M Le Gallo, R Khaddam-Aljameh, M Stanisavljevic, A Vasilopoulos, ... Nature Electronics 6 (9), 680-693, 2023 | 57 | 2023 |
| Computational memory-based inference and training of deep neural networks A Sebastian, I Boybat, M Dazzi, I Giannopoulos, V Jonnalagadda, V Joshi, ... 2019 Symposium on VLSI Technology, T168-T169, 2019 | 47 | 2019 |
| Deep learning acceleration based on in-memory computing E Eleftheriou, M Le Gallo, SR Nandakumar, C Piveteau, I Boybat, V Joshi, ... IBM Journal of Research and Development 63 (6), 7: 1-7: 16, 2019 | 30 | 2019 |
| Graphene-based wireless agile interconnects for massive heterogeneous multi-chip processors S Abadal, R Guirado, H Taghvaee, A Jain, EP de Santana, PH Bolívar, ... IEEE Wireless Communications, 2022 | 26 | 2022 |
| Accelerating inference of convolutional neural networks using in-memory computing M Dazzi, A Sebastian, L Benini, E Eleftheriou Frontiers in Computational Neuroscience 15, 674154, 2021 | 22 | 2021 |
| Efficient pipelined execution of CNNs based on in-memory computing and graph homomorphism verification M Dazzi, A Sebastian, T Parnell, PA Francese, L Benini, E Eleftheriou IEEE Transactions on Computers 70 (6), 922-935, 2021 | 18 | 2021 |
| Alpine: Analog in-memory acceleration with tight processor integration for deep learning J Klein, I Boybat, YM Qureshi, M Dazzi, A Levisse, G Ansaloni, M Zapater, ... IEEE Transactions on Computers 72 (7), 1985-1998, 2022 | 14 | 2022 |
| 5 parallel prism: A topology for pipelined implementations of convolutional neural networks using computational memory M Dazzi, A Sebastian, PA Francese, T Parnell, L Benini, E Eleftheriou arXiv preprint arXiv:1906.03474, 2019 | 9 | 2019 |
| Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes M Dazzi, P Palestri, D Rossi, A Bandiziol, I Loi, D Bellasi, L Benini 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 8 | 2018 |
| Method for implementing processing elements in a chip card M Dazzi, PA Francese, A Sebastian, R Khaddam-Aljameh, ES Eleftheriou US Patent 10,831,691, 2020 | 6 | 2020 |
| Compiling neural networks for a computational memory accelerator K Kourtis, M Dazzi, N Ioannou, T Grosser, A Sebastian, E Eleftheriou arXiv preprint arXiv:2003.04293, 2020 | 6 | 2020 |
| A simple and fast tool for the modelling of inter-symbol interference and equalization in high-speed chip-to-chip interfaces A Cortiula, M Dazzi, M Marcon, D Menin, M Scapol, A Bandiziol, ... 2019 42nd International Convention on Information and Communication …, 2019 | 3 | 2019 |
| A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS H Okuhara, A Elnaqib, M Dazzi, P Palestri, S Benatti, L Benini, D Rossi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (10 …, 2021 | 2 | 2021 |
| Architecting more than Moore: wireless plasticity for massive heterogeneous computer architectures (WiPLASH) J Klein, A Levisse, G Ansaloni, D Atienza, M Zapater, M Dazzi, ... Proceedings of the 18th ACM International Conference on Computing Frontiers …, 2021 | 2 | 2021 |
| Performing dot product operations using a memristive crossbar array M Dazzi, PA Francese, A Sebastian, M Le Gallo-Bourdeau, ES Eleftheriou US Patent App. 16/561,110, 2021 | 2 | 2021 |
| A Simple Modelling Tool for Fast Combined Simulation of Interconnections, Inter-Symbol Interference and Equalization in High-Speed Serial Interfaces for Chip-to-Chip Communications D Menin, T Bernardi, A Cortiula, M Dazzi, AD Prà, M Marcon, M Scapol, ... ADVANCES IN SCIENCE, TECHNOLOGY AND ENGINEERING SYSTEMS JOURNAL 5 (2), 527-536, 2020 | 2 | 2020 |
| BBPD with wide input phase range M Kossel, P Francese, T Morf, M Brändli, V Khatri, S Yonar, M Dazzi, ... Electronics Letters 55 (5), 249-250, 2019 | 2 | 2019 |
| 11.3 Metis AIPU: A 12nm 15TOPS/W 209.6 TOPS SoC for Cost-and Energy-Efficient Inference at the Edge PA Hager, B Moons, S Cosemans, IA Papistas, B Rooseleer, J Van Loon, ... 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 212-214, 2024 | | 2024 |
