| LACS: A locality-aware cost-sensitive cache replacement algorithm M Kharbutli, R Sheikh IEEE Transactions on Computers 63 (8), 1975-1987, 2013 | 34 | 2013 |
| Load value prediction via path-based address prediction: Avoiding mispredictions due to conflicting stores R Sheikh, HW Cain, R Damodaran Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 33 | 2017 |
| Control-flow decoupling R Sheikh, J Tuck, E Rotenberg 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 329-340, 2012 | 27 | 2012 |
| Improving cache performance by combining cost-sensitivity and locality principles in cache replacement algorithms R Sheikh, M Kharbutli 2010 IEEE International Conference on Computer Design, 76-83, 2010 | 27 | 2010 |
| Selective flushing of instructions in an instruction pipeline in a processor back to an execution-resolved target address, in response to a precise interrupt VRK Naresh, RM Al Sheikh, HW Cain III US Patent 10,255,074, 2019 | 25 | 2019 |
| Next line prefetchers employing initial high prefetch prediction confidence states for throttling next line prefetches in a processor-based system B Dwiel, RM Al Sheikh US Patent 10,353,819, 2019 | 22 | 2019 |
| Control-flow decoupling: An approach for timely, non-speculative branching R Sheikh, J Tuck, E Rotenberg IEEE Transactions on Computers 64 (8), 2182-2203, 2014 | 19 | 2014 |
| Efficient load value prediction using multiple predictors and filters R Sheikh, D Hower 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 13 | 2019 |
| Elastic instruction fetching A Perais, R Sheikh, L Yen, M McIlvaine, RD Clancy 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 13 | 2019 |
| Selective bypassing of allocation in a cache S Priyadarshi, BHA Dwiel, RMA Al Sheikh, HW Cain III US Patent 10,223,278, 2019 | 10 | 2019 |
| Dynamic cache partitioning through hill-climbing RMA Al Sheikh, HW Cain III US Patent App. 15/271,161, 2018 | 10 | 2018 |
| Fast pipeline restart in processor with decoupled fetcher A Perais, MS McIlvaine, RMA Al Sheikh, RD Clancy, L Yen, RW Smith US Patent App. 16/193,935, 2019 | 8 | 2019 |
| Dynamic pipeline throttling using confidence-based weighting of in-flight branch instructions S Priyadarshi, RM Al Sheikh, R Damodaran, MS McIlvaine, JT Bridges US Patent 10,474,462, 2019 | 7 | 2019 |
| A case for a software-managed reconfigurable branch predictor M Al-Otoom, R Sheikh, E Rotenberg 5th Workshop on Architectural and Microarchitectural Support for Binary …, 2012 | 7 | 2012 |
| REPLAYING SPECULATIVELY DISPATCHED LOAD-DEPENDENT INSTRUCTIONS IN RESPONSE TO A CACHE MISS FOR A PRODUCING LOAD INSTRUCTION IN AN OUT-OF-ORDER PROCESSOR (OoP) MR Kulkarni, RM Al Sheikh, R Damodaran US Patent App. 15/271,366, 2018 | 6 | 2018 |
| Method and apparatus for dynamically tuning speculative optimizations based on instruction signature RM Al Sheikh, S Priyadarshi US Patent App. 15/087,728, 2017 | 6 | 2017 |
| SPF: Selective pipeline flush VRK Naresh, R Sheikh, A Perais, HW Cain 2018 IEEE 36th International Conference on Computer Design (ICCD), 152-155, 2018 | 5 | 2018 |
| Swapping and restoring context-specific branch predictor states on context switches in a processor RM Al Sheikh, MS McIlvaine US Patent 11,068,273, 2021 | 4 | 2021 |
| Slice construction for pre-executing data dependent loads S Priyadarshi, RMA Al Sheikh, B Dwiel, D Hower US Patent 10,379,863, 2019 | 4 | 2019 |
| Intelligent data prefetching using address delta prediction RM Al Sheikh, S Priyadarshi, B Dwiel, DJ Palframan, D Hower, ... US Patent 10,303,608, 2019 | 4 | 2019 |
